Searched refs:MMX (Results 1 – 25 of 82) sorted by relevance
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27 0x01 MMX packed multiplies28 0x02 MMX packed shifts29 0x04 MMX pack operations30 0x08 MMX unpack operations31 0x10 MMX packed logical32 0x20 MMX packed arithmetic35 0x00 MMX->float operations36 0x01 float->MMX operations
75 event:0xb1 counters:0,1 um:zero minimum:3000 name:MMX_SAT_INSTR_EXEC : number of MMX saturating ins…76 event:0xb2 counters:0,1 um:mmx_uops minimum:3000 name:MMX_UOPS_EXEC : number of MMX UOPS executed77 …1 um:mmx_instr_type_exec minimum:3000 name:MMX_INSTR_TYPE_EXEC : number of MMX packing instructions78 event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions80 event:0xce counters:0,1 um:zero minimum:3000 name:MMX_INSTR_RET : number of MMX instructions retired
17 0x01 MMX packed multiplies18 0x02 MMX packed shifts19 0x04 MMX pack operations20 0x08 MMX unpack operations21 0x10 MMX packed logical22 0x20 MMX packed arithmetic25 0x00 MMX->float operations26 0x01 float->MMX operations
71 event:0xb0 counters:0,1 um:zero minimum:3000 name:MMX_INSTR_EXEC : number of MMX instructions execu…72 event:0xb1 counters:0,1 um:zero minimum:3000 name:MMX_SAT_INSTR_EXEC : number of MMX saturating ins…73 event:0xb2 counters:0,1 um:mmx_uops minimum:3000 name:MMX_UOPS_EXEC : number of MMX UOPS executed74 …1 um:mmx_instr_type_exec minimum:3000 name:MMX_INSTR_TYPE_EXEC : number of MMX packing instructions75 event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions77 event:0xce counters:0,1 um:zero minimum:3000 name:MMX_INSTR_RET : number of MMX instructions retired
31 0x01 MMX packed multiplies32 0x02 MMX packed shifts33 0x04 MMX pack operations34 0x08 MMX unpack operations35 0x10 MMX packed logical36 0x20 MMX packed arithmetic39 0x00 MMX->float operations40 0x01 float->MMX operations
76 event:0xb1 counters:0,1 um:zero minimum:3000 name:MMX_SAT_INSTR_EXEC : number of MMX saturating ins…77 event:0xb2 counters:0,1 um:mmx_uops minimum:3000 name:MMX_UOPS_EXEC : number of MMX UOPS executed78 …1 um:mmx_instr_type_exec minimum:3000 name:MMX_INSTR_TYPE_EXEC : number of MMX packing instructions79 event:0xcc counters:0,1 um:mmx_trans minimum:3000 name:FP_MMX_TRANS : MMX-floating point transitions81 event:0xce counters:0,1 um:zero minimum:3000 name:MMX_INSTR_RET : number of MMX instructions retired107 event:0xce counters:0,1 um:zero minimum:3000 name:EMON_SIMD_INSTR_RETIRED : Number of retired MMX i…
46 0x01 MMX packed multiplies47 0x02 MMX packed shifts48 0x04 MMX pack operations49 0x08 MMX unpack operations50 0x10 MMX packed logical51 0x20 MMX packed arithmetic54 0x00 MMX->float operations55 0x01 float->MMX operations
26 makefile.gccmmx => Generic gcc makefile previously using MMX code36 makefile.nommx => Generic gcc makefile not using MMX code45 makefile.solaris-x86 => Solaris 2.X makefile (gcc, no MMX code,55 previously using MMX code
2 // Random ideas for the X86 backend: MMX-specific stuff.63 is we are not smart about materializing constants in MMX registers. With -m64
1 //===-- X86InstrMMX.td - Describe the MMX Instruction Set --*- tablegen -*-===//10 // This file describes the X86 MMX instruction set, defining the instructions,14 // All instructions that use MMX should be in this file, even if they also use20 // MMX Multiclasses80 // MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.118 /// Unary MMX instructions requiring SSSE3.132 /// Binary MMX instructions requiring SSSE3.150 /// PALIGN MMX instructions (require SSSE3).185 // MMX EMMS Instruction192 // MMX Scalar Instructions[all …]
325 // MMXPI - SSE 1 & 2 packed instructions with MMX operands385 // MMX operands.387 // MMX operands.452 // MMXSS38I - SSSE3 instructions with T8 prefix and MMX operands.453 // MMXSS3AI - SSSE3 instructions with TA prefix and MMX operands.456 // uses the MMX registers. The 64-bit versions are grouped with the MMX626 // MMX Instruction templates629 // MMXI - MMX instructions with TB prefix.630 // MMXI64 - MMX instructions with TB prefix valid only in 64 bit mode.631 // MMX2I - MMX / SSE2 instructions with TB and OpSize prefixes.[all …]
45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 enumerator196 bool hasMMX() const { return X86SSELevel >= MMX; } in hasMMX()
2 ; There are no MMX operations in bork; promoted to XMM.17 ; pork uses MMX.
6 ; there are no MMX instructions here; we use XMM.20 ; This is how to get MMX instructions.
2 ; There are no MMX operations here, so we use XMM or i64.48 ; MMX intrinsics calls get us MMX instructions.
3 ; This is not an MMX operation; promoted to XMM.
2 ; There are no MMX instructions here. We use add+adcl for the adds.32 ; This is the original test converted to use MMX intrinsics.
2 ; MMX insertelement is not available; these are promoted to XMM.
6 ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
12 ; This isn't spectacular, but it's MMX code at -O0...
2 ; Since the add is not an MMX add, we don't have a movq2dq any more.
3 ; 64-bit stores here do not use MMX.
7 # Enable MMX code path for x86, except on Darwin where it fails
59 {\listtext \'95 }SDL has processor specific optimizations (Altivec, MMX/SSE)\77 For the Altivec and MMX/SSE options, we had to use architecture specific build flags. Furthermore, …87 …pendence, but everything seemed to be in order. As such, we cannot compile MMX/SSE optimizations u…116 …tempted to correct this oversight, however, the SMPEG framework itself has MMX code which has also…123 So SMPEG is currently compiled without MMX optimizations.\132 Also it appears that the MMX/SSE code has been rewritten as well so that the obstacles we faced in …141 Stephane Marchesin (MMX/SSE code expert)\
18 // MMX/SSE/etc is turned on. We should do this too.57 // MMX59 // All MMX instructions will be generated via builtins. Any MMX vector122 // MMX2 (MMX+SSE) intrinsics137 // MMX+SSE2145 // MMX+SSSE3