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Searched refs:MRM3r (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h264 MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, // Format /0 /1 /2 /3 enumerator
563 case X86II::MRM2r: case X86II::MRM3r: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp683 case X86II::MRM2r: case X86II::MRM3r: in EmitVEXOpcodePrefix()
1107 case X86II::MRM2r: case X86II::MRM3r: in EncodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp60 MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, enumerator
726 case X86Local::MRM3r: in emitInstructionSpecifier()
826 case X86Local::MRM3r: in emitDecodePath()
869 case X86Local::MRM3r: in emitDecodePath()
950 case X86Local::MRM3r: in emitDecodePath()
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td371 def RCR8r1 : I<0xD0, MRM3r, (outs GR8:$dst), (ins GR8:$src1),
373 def RCR8ri : Ii8<0xC0, MRM3r, (outs GR8:$dst), (ins GR8:$src1, i8imm:$cnt),
376 def RCR8rCL : I<0xD2, MRM3r, (outs GR8:$dst), (ins GR8:$src1),
379 def RCR16r1 : I<0xD1, MRM3r, (outs GR16:$dst), (ins GR16:$src1),
381 def RCR16ri : Ii8<0xC1, MRM3r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$cnt),
384 def RCR16rCL : I<0xD3, MRM3r, (outs GR16:$dst), (ins GR16:$src1),
387 def RCR32r1 : I<0xD1, MRM3r, (outs GR32:$dst), (ins GR32:$src1),
389 def RCR32ri : Ii8<0xC1, MRM3r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$cnt),
392 def RCR32rCL : I<0xD3, MRM3r, (outs GR32:$dst), (ins GR32:$src1),
395 def RCR64r1 : RI<0xD1, MRM3r, (outs GR64:$dst), (ins GR64:$src1),
[all …]
DX86InstrSystem.td232 def LTRr : I<0x00, MRM3r, (outs), (ins GR16:$src),
485 def WRGSBASE : I<0xAE, MRM3r, (outs), (ins GR32:$src),
488 def WRGSBASE64 : RI<0xAE, MRM3r, (outs), (ins GR64:$src),
DX86InstrArithmetic.td337 def NEG8r : I<0xF6, MRM3r, (outs GR8 :$dst), (ins GR8 :$src1),
341 def NEG16r : I<0xF7, MRM3r, (outs GR16:$dst), (ins GR16:$src1),
345 def NEG32r : I<0xF7, MRM3r, (outs GR32:$dst), (ins GR32:$src1),
349 def NEG64r : RI<0xF7, MRM3r, (outs GR64:$dst), (ins GR64:$src1), "neg{q}\t$dst",
1144 defm SBB : ArithBinOp_RFF<0x18, 0x1A, 0x1C, "sbb", MRM3r, MRM3m, X86sbb_flag,
DX86CodeEmitter.cpp1052 case X86II::MRM2r: case X86II::MRM3r: in emitVEXOpcodePrefix()
1341 case X86II::MRM2r: case X86II::MRM3r: in emitInstruction()
DX86InstrFormats.td26 def MRM3r : Format<19>; def MRM4r : Format<20>; def MRM5r : Format<21>;
DX86InstrInfo.td1596 defm BLSI32 : bmi_bls<"blsi{l}", MRM3r, MRM3m, GR32, i32mem,
1598 defm BLSI64 : bmi_bls<"blsi{q}", MRM3r, MRM3m, GR64, i64mem,
DX86InstrSSE.td3951 def VPSRLDQri : PDIi8<0x73, MRM3r,
3997 def VPSRLDQYri : PDIi8<0x73, MRM3r,
4042 def PSRLDQri : PDIi8<0x73, MRM3r,
/external/llvm/test/TableGen/
DTargetInstrInfo.td53 def MRM3r : Format<19>; def MRM4r : Format<20>; def MRM5r : Format<21>;