Searched refs:REG_SEQUENCE (Results 1 – 12 of 12) sorted by relevance
/external/llvm/include/llvm/Target/ |
D | TargetOpcodes.h | 81 REG_SEQUENCE = 12, enumerator
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D | Target.td | 737 def REG_SEQUENCE : Instruction {
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/external/llvm/test/CodeGen/ARM/ |
D | 2012-01-24-RegSequenceLiveRange.ll | 7 ; This test case is exercising REG_SEQUENCE, and chains of REG_SEQUENCE.
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D | crash.ll | 31 ; PR10520 - REG_SEQUENCE with implicit-def operands.
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D | reg_sequence.ll | 3 ; Implementing vld / vst as REG_SEQUENCE eliminates the extra vmov's.
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D | vldlane.ll | 500 ; Radar 8776599: If one of the operands to a QQQQ REG_SEQUENCE is a register
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 622 return getOpcode() == TargetOpcode::REG_SEQUENCE; 658 case TargetOpcode::REG_SEQUENCE:
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ResourcePriorityQueue.cpp | 267 case TargetOpcode::REG_SEQUENCE: in isResourceAvailable() 307 case TargetOpcode::REG_SEQUENCE: in reserveResources()
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D | InstrEmitter.cpp | 601 TII->get(TargetOpcode::REG_SEQUENCE), NewVReg); in EmitRegSequence() 605 const MCInstrDesc &II = TII->get(TargetOpcode::REG_SEQUENCE); in EmitRegSequence() 713 if (Opc == TargetOpcode::REG_SEQUENCE) { in EmitMachineNode()
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D | ScheduleDAGRRList.cpp | 279 if (Opcode == TargetOpcode::REG_SEQUENCE) { in GetCostForDef() 2088 Opc == TargetOpcode::REG_SEQUENCE || in unscheduledNode()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonMachineScheduler.cpp | 238 case TargetOpcode::REG_SEQUENCE: in isResourceAvailable() 283 case TargetOpcode::REG_SEQUENCE: in reserveResources()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1452 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 5); in PairSRegs() 1463 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 5); in PairDRegs() 1474 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 5); in PairQRegs() 1490 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 9); in QuadSRegs() 1505 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 9); in QuadDRegs() 1520 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 9); in QuadQRegs()
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