| /external/valgrind/main/memcheck/tests/amd64-linux/ |
| D | int3-amd64.stdout.exp | 2 in int_handler, RIP is ...
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| /external/llvm/test/CodeGen/X86/ |
| D | 2010-05-12-FastAllocKills.ll | 9 ; %reg1025<def> = MUL_Fp80m32 %reg1024, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
20 ; %FP2<def> = MUL_Fp80m32 %FP1, %RIP, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
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| /external/kernel-headers/original/asm-x86/ |
| D | ptrace-abi.h | 47 #define RIP 128 macro
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 140 def RIP : RegisterWithSubRegs<"rip", [EIP]>, DwarfRegNum<[16, -2, -2]>;
303 // GR64 - 64-bit GPRs. This oddly includes RIP, which isn't accurate, since
304 // RIP isn't really a register and it can't be used anywhere except in an
308 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
334 R8, R9, R11, RIP)>;
354 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
364 // GR64_NOSP - GR64 registers except RSP (and RIP).
365 def GR64_NOSP : RegisterClass<"X86", [i64], 64, (sub GR64, RSP, RIP)>;
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| D | X86RegisterInfo.cpp | 60 ? X86::RIP : X86::EIP, in X86RegisterInfo()
290 Reserved.set(X86::RIP); in getReservedRegs()
291 for (MCSubRegIterator I(X86::RIP, this); I.isValid(); ++I) in getReservedRegs()
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| D | X86CodeEmitter.cpp | 484 if (BaseReg == X86::RIP || in emitMemModRMByte()
503 if (BaseReg != 0 && BaseReg != X86::RIP) in emitMemModRMByte()
516 BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode in emitMemModRMByte()
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| D | X86FastISel.cpp | 526 AM.Base.Reg = X86::RIP; in X86SelectAddress()
555 StubAM.Base.Reg = X86::RIP; in X86SelectAddress()
658 AM.Base.Reg = X86::RIP; in X86SelectCallAddress()
2105 PICBase = X86::RIP; in TargetMaterializeConstant()
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| D | X86AsmPrinter.cpp | 319 BaseReg.getReg() == X86::RIP) in printLeaMemReference()
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| D | X86ISelDAGToDAG.cpp | 94 return RegNode->getReg() == X86::RIP; in isRIPRelative()
663 AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64)); in MatchWrapper()
726 AM.Base_Reg = CurDAG->getRegister(X86::RIP, MVT::i64); in MatchAddress()
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| D | X86MCInstLower.cpp | 588 LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base in LowerTlsAddr()
|
| /external/llvm/test/MC/Disassembler/X86/ |
| D | enhanced.txt | 3 # CHECK: [o:jne][w: ][0-p:-][0-l:10=10] <br> 0:[RIP/112](pc)=18446744073709551606
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| /external/valgrind/main/VEX/auxprogs/ |
| D | genoffsets.c | 116 GENOFFSET(AMD64,amd64,RIP); in foo()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 361 ? X86::RIP // Should have dwarf #16. in createX86MCRegisterInfo()
401 MachineLocation CSSrc(is64Bit ? X86::RIP : X86::EIP); in createX86MCAsmInfo()
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| D | X86AsmBackend.cpp | 246 if (Op.isReg() && Op.getReg() == X86::RIP) in mayNeedRelaxation()
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| D | X86MCCodeEmitter.cpp | 309 if (BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode in EmitMemModRMByte()
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| /external/valgrind/main/coregrind/m_sigframe/ |
| D | sigframe-amd64-linux.c | 362 SC2(rip,RIP); in synth_ucontext()
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 291 ENTRY(RIP)
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| D | X86Disassembler.cpp | 567 baseReg = MCOperand::CreateReg(X86::RIP); // Section 2.2.1.6 in translateRMMemory()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | ObjCARC.cpp | 3250 Instruction *RIP = *RI; in PerformCodePlacement() local
3251 if (ReleasesToMove.ReverseInsertPts.insert(RIP)) in PerformCodePlacement()
3252 NewDelta -= BBStates[RIP->getParent()].GetAllPathCount(); in PerformCodePlacement()
3302 Instruction *RIP = *RI; in PerformCodePlacement() local
3303 if (RetainsToMove.ReverseInsertPts.insert(RIP)) { in PerformCodePlacement()
3304 PathCount = BBStates[RIP->getParent()].GetAllPathCount(); in PerformCodePlacement()
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| /external/tcpdump/ |
| D | CHANGES | 327 - Really fix the RIP printer
564 - Added RIP V2 support. Thanks to Jeffrey Honig (jch@bsdi.com)
850 - RIP packets are now printed.
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| /external/strace/ |
| D | util.c | 1103 if (upeek(tcp, 8*RIP, &rip) < 0) { in printcall()
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| D | process.c | 2690 { 8*RIP, "8*RIP" },
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| /external/iproute2/doc/ |
| D | ip-tunnels.tex | 92 with ttl 1 will reach peering host (f.e.\ RIP, OSPF or EBGP)
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| /external/webkit/Tools/iExploder/iexploder-1.7.2/ |
| D | ChangeLog.txt | 390 Oh jesus.. we now have a decent subtest implementation. RIP Bo Skough.
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| /external/llvm/docs/ |
| D | TableGenFundamentals.rst | 184 RDX, RIP, RSI, RSP, SI, SIL, SP, SPL, ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7,
|