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Searched refs:Rn (Results 1 – 24 of 24) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td264 let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm);
270 let MIOperandInfo = (ops GPR:$Rn, rGPR:$Rm);
295 bits<4> Rn;
307 bits<4> Rn;
310 let Inst{19-16} = Rn;
346 bits<4> Rn;
349 let Inst{19-16} = Rn;
379 bits<4> Rn;
382 let Inst{19-16} = Rn;
391 bits<4> Rn;
[all …]
DARMInstrInfo.td984 let TwoOperandAliasConstraint = "$Rn = $Rd" in
991 def ri : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm,
992 iii, opc, "\t$Rd, $Rn, $imm",
993 [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]> {
995 bits<4> Rn;
998 let Inst{19-16} = Rn;
1003 def rr : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
1004 iir, opc, "\t$Rd, $Rn, $Rm",
1005 [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]> {
1007 bits<4> Rn;
[all …]
DARMInstrThumb.td335 def tADDspi : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, t_imm0_508s4:$imm),
346 def tSUBspi : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, t_imm0_508s4:$imm),
367 def tADDrSP : T1pI<(outs GPR:$Rdn), (ins GPRsp:$sp, GPR:$Rn), IIC_iALUr,
368 "add", "\t$Rdn, $sp, $Rn", []>,
379 def tADDspr : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, GPR:$Rm), IIC_iALUr,
692 def tLDMIA : T1I<(outs), (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops),
693 IIC_iLoad_m, "ldm${p}\t$Rn, $regs", []>, T1Encoding<{1,1,0,0,1,?}> {
694 bits<3> Rn;
696 let Inst{10-8} = Rn;
705 "$Rn = $wb", IIC_iLoad_mu>,
[all …]
DARMInstrNEON.td554 : PseudoVFPLdStM<(outs DPair:$dst), (ins GPR:$Rn),
556 [(set DPair:$dst, (v2f64 (load GPR:$Rn)))]>;
561 : PseudoVFPLdStM<(outs), (ins DPair:$src, GPR:$Rn),
563 [(store (v2f64 DPair:$src), GPR:$Rn)]>;
611 (ins addrmode6:$Rn), IIC_VLD1,
612 "vld1", Dt, "$Vd, $Rn", "", []> {
614 let Inst{4} = Rn{4};
619 (ins addrmode6:$Rn), IIC_VLD1x2,
620 "vld1", Dt, "$Vd, $Rn", "", []> {
622 let Inst{5-4} = Rn{5-4};
[all …]
DARMInstrFormats.td75 // The instruction has an Rn register operand.
77 // it doesn't have a Rn operand.
600 bits<4> Rn;
603 let Inst{19-16} = Rn;
618 bits<4> Rn;
621 let Inst{19-16} = Rn;
634 // {17-14} Rn
658 let Inst{19-16} = addr{12-9}; // Rn
688 // {12-9} Rn
698 let Inst{19-16} = addr; // Rn
[all …]
DARMInstrVFP.td130 AXDI4<(outs), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops),
132 !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> {
138 AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs,
141 !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> {
147 AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs,
150 !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> {
158 AXSI4<(outs), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops),
160 !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> {
170 AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs,
173 !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> {
[all …]
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1301 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeCopMemInstruction() local
1346 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeCopMemInstruction()
1442 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local
1461 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
1481 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
1488 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeAddrMode2IdxInstruction()
1502 if (writeback && (Rn == 15 || Rn == Rt)) in DecodeAddrMode2IdxInstruction()
1545 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeSORegMemOperand() local
1567 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) in DecodeSORegMemOperand()
1587 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode3Instruction() local
[all …]
/external/qemu/
Dtrace.c896 int Rn = (insn >> 12) & 15; in get_insn_ticks_arm() local
899 result += _interlock_use(Rn); in get_insn_ticks_arm()
901 if (Rn != 0) /* UNDEFINED */ in get_insn_ticks_arm()
934 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local
936 result += _interlock_use(Rn) + _interlock_use(Rm); in get_insn_ticks_arm()
943 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local
945 result += _interlock_use(Rn); in get_insn_ticks_arm()
957 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local
959 result += _interlock_use(Rn) + _interlock_use(Rm); in get_insn_ticks_arm()
970 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local
[all …]
Darm-dis.c3450 unsigned int Rn = (given & 0x000f0000) >> 16; in print_insn_thumb32() local
3458 func (stream, "[%s", arm_regnames[Rn]); in print_insn_thumb32()
3461 else if (Rn == 15) /* 12-bit negative immediate offset */ in print_insn_thumb32()
3517 if (Rn == 15) in print_insn_thumb32()
3531 unsigned int Rn = (given & 0x000f0000) >> 16; in print_insn_thumb32() local
3534 func (stream, "[%s", arm_regnames[Rn]); in print_insn_thumb32()
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp714 unsigned Rn = CTX.getRegisterInfo().getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local
716 return (Rm << 3) | Rn; in getThumbAddrModeRegRegOpValue()
930 unsigned Rn = CTX.getRegisterInfo().getEncodingValue(MO.getReg()); in getLdStSORegOpValue() local
945 Binary |= Rn << 13; in getLdStSORegOpValue()
961 unsigned Rn = CTX.getRegisterInfo().getEncodingValue(MO.getReg()); in getAddrMode2OpValue() local
963 Binary |= Rn << 14; in getAddrMode2OpValue()
1033 unsigned Rn = CTX.getRegisterInfo().getEncodingValue(ARM::PC); // Rn is PC. in getAddrMode3OpValue() local
1041 return (Rn << 9) | (1 << 13); in getAddrMode3OpValue()
1043 unsigned Rn = CTX.getRegisterInfo().getEncodingValue(MO.getReg()); in getAddrMode3OpValue() local
1051 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13); in getAddrMode3OpValue()
[all …]
/external/llvm/test/MC/Disassembler/ARM/
Dinvalid-t2STR_POST-thumb.txt9 # if Rn == '1111' then UNDEFINED
Dinvalid-LDM-thumb.txt3 # Writeback is not allowed is Rn is in the target register list.
Dinvalid-LDRD_PRE-thumb.txt10 # if Rn = '1111' then SEE LDRD (literal)
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/es-ES/
Des-ES_kdt_g2p.pkb11 �U�����9���rEL_^���ZdM��e���8�X��4�չE%Mg�>�h�i�>K'`(�>~B`�Z�,�Rn
Des-ES_zl0_kpdf_mgc.pkb3210 Rn{�Qp�fc0hD`WmMN�mX.8ZN?%VKR0J^CeArrn[�-7P3;ECCQQ�� I��7�������W�M��U�3�i^����� ��!�V��…
/external/openssl/crypto/pkcs7/
Des1.pem22 Rn/KOhHaYP2VzAh40gQIvKMAAWh9oFsEEIMwIoOmLwLH5wf+8QdbDhoECH8HwZt9a12dBAjL
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/it-IT/
Dit-IT_cm0_kdt_dur.pkb76 �!6Rn���zp���!YH7�������9�D�'��r��Zld�X�Tj�����
/external/llvm/test/MC/ARM/
Dthumb2-narrow-dp.ll5 // OP{S}{<c>}{<q>} {<Rd>,} <Rn>, <Rm>
7 // - Rd == Rn
8 // - Rd, Rn and Rm are < r8
11 // - Rd == Rn || Rd == Rm
12 // - Rd, Rn and Rm are < r8
/external/valgrind/main/none/tests/arm/
Dvfp.stdout.exp873 vldr d30, [r12] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
878 vldr d18, [r3] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
880 vldr d17, [r10] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
884 vldr d8, [r4] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
890 vldr s30, [r12] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
895 vldr s18, [r3] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
897 vldr s17, [r10] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
901 vldr s8, [r4] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp5320 unsigned Rn = Inst.getOperand(0).getReg(); in validateInstruction() local
5325 if (checkLowRegisterList(Inst, 3, Rn, 0, listContainsBase) && !isThumbTwo()) in validateInstruction()
7119 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local
7124 if (checkLowRegisterList(Inst, 3, Rn, 0, listContainsBase) || in processInstruction()
7143 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local
7145 if (checkLowRegisterList(Inst, 4, Rn, 0, listContainsBase)) { in processInstruction()
/external/llvm/include/llvm/Target/
DTarget.td420 /// constraint. For example, "$Rn = $Rd".
/external/qemu/distrib/jpeg-6b/
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/external/jpeg/
Dtestimg.ppm4 …Rn�So�Tr�Xt�Zu�]u�[t�Xt�Wv�Xw�Wv�Wv�Uu�Tt�S{�[{�]z�^u�[m�Ub~MXrCSj>AW0?U/<R,[K;^N>`P@`P@`P@_O?`P@a…
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/
Dde-DE_gl0_kpdf_mgc.pkb2155 …���������K�`\������u�;�� }���e�P��?G�|��G�����w����_�t�\�Rn����_�<c�m>26&^fU��懙�…