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Searched refs:SBB (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/CodeGen/
DShrinkWrapping.cpp911 MachineBasicBlock* SBB = *BI; in findFastExitPath() local
913 if (SBB->succ_size() > 1) { in findFastExitPath()
917 exitPath += "->" + getBasicBlockName(SBB); in findFastExitPath()
969 MachineBasicBlock* SBB = *BI; in verifySpillRestorePlacement() local
970 if (SBB == MBB) in verifySpillRestorePlacement()
974 if (CSRSave[SBB].intersects(spilled) && in verifySpillRestorePlacement()
975 !restored.contains(CSRSave[SBB] & spilled)) in verifySpillRestorePlacement()
979 if (CSRRestore[SBB].intersects(spilled)) in verifySpillRestorePlacement()
980 restored |= (CSRRestore[SBB] & spilled); in verifySpillRestorePlacement()
984 if (isReturnBlock(SBB) || SBB->succ_size() == 0) { in verifySpillRestorePlacement()
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/external/llvm/lib/Target/X86/
DX86ISelLowering.h252 ADD, SUB, ADC, SBB, SMUL, enumerator
DX86InstrArithmetic.td990 /// SBB.
1144 defm SBB : ArithBinOp_RFF<0x18, 0x1A, 0x1C, "sbb", MRM3r, MRM3m, X86sbb_flag,
DX86ISelLowering.cpp8898 Opc == X86ISD::SBB || in isX86LogicalCmp()
11252 case ISD::SUBE: Opc = X86ISD::SBB; ExtraOp = true; break; in LowerADDC_ADDE_SUBC_SUBE()
11613 case X86ISD::SBB: return "X86ISD::SBB"; in getTargetNodeName()
13282 case X86ISD::SBB: in computeMaskedBitsForTargetNode()
16023 return DAG.getNode(N->getOpcode() == ISD::SUB ? X86ISD::ADC : X86ISD::SBB, in OptimizeConditionalInDecrement()
16026 return DAG.getNode(N->getOpcode() == ISD::SUB ? X86ISD::SBB : X86ISD::ADC, in OptimizeConditionalInDecrement()
DX86InstrInfo.td230 def X86sbb_flag : SDNode<"X86ISD::SBB", SDTBinaryArithWithFlagsInOut>;