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Searched refs:SDep (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp82 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
88 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
93 void ReleasePred(SUnit *SU, SDep *PredEdge);
134 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred()
275 SDep ChainPred; in CopyAndMoveSuccessors()
276 SmallVector<SDep, 4> ChainSuccs; in CopyAndMoveSuccessors()
277 SmallVector<SDep, 4> LoadPreds; in CopyAndMoveSuccessors()
278 SmallVector<SDep, 4> NodePreds; in CopyAndMoveSuccessors()
279 SmallVector<SDep, 4> NodeSuccs; in CopyAndMoveSuccessors()
304 const SDep &Pred = LoadPreds[i]; in CopyAndMoveSuccessors()
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DScheduleDAGRRList.cpp191 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
199 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
210 void ReleasePred(SUnit *SU, const SDep *PredEdge);
217 void CapturePred(SDep *PredEdge);
345 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) { in ReleasePred()
769 void ScheduleDAGRRList::CapturePred(SDep *PredEdge) { in CapturePred()
996 SmallVector<SDep, 4> ChainPreds; in CopyAndMoveSuccessors()
997 SmallVector<SDep, 4> ChainSuccs; in CopyAndMoveSuccessors()
998 SmallVector<SDep, 4> LoadPreds; in CopyAndMoveSuccessors()
999 SmallVector<SDep, 4> NodePreds; in CopyAndMoveSuccessors()
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DScheduleDAGSDNodes.cpp488 const SDep &dep = SDep(OpSU, isChain ? SDep::Order : SDep::Data, in AddSchedEdges()
491 computeOperandLatency(OpN, N, i, const_cast<SDep &>(dep)); in AddSchedEdges()
492 ST.adjustSchedDependency(OpSU, SU, const_cast<SDep &>(dep)); in AddSchedEdges()
619 unsigned OpIdx, SDep& dep) const{ in computeOperandLatency()
624 if (dep.getKind() != SDep::Data) in computeOperandLatency()
DScheduleDAGVLIW.cpp86 void releaseSucc(SUnit *SU, const SDep &D);
115 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc()
DScheduleDAGSDNodes.h103 unsigned OpIdx, SDep& dep) const;
/external/llvm/lib/CodeGen/
DScheduleDAGInstrs.cpp275 SDep dep(SU, SDep::Data, LDataLatency, *Alias); in addPhysRegDataDeps()
307 SDep::Kind Kind = MO.isUse() ? SDep::Anti : SDep::Output; in addPhysRegDeps()
318 (Kind != SDep::Output || !MO.isDead() || in addPhysRegDeps()
320 if (Kind == SDep::Anti) in addPhysRegDeps()
321 DefSU->addPred(SDep(SU, Kind, 0, /*Reg=*/*Alias)); in addPhysRegDeps()
325 DefSU->addPred(SDep(SU, Kind, AOLat, /*Reg=*/*Alias)); in addPhysRegDeps()
373 ExitSU.addPred(SDep(SU, SDep::Order, Latency, in addPhysRegDeps()
443 DefSU->addPred(SDep(SU, SDep::Output, OutLatency, Reg)); in addVRegDefDeps()
475 SDep dep(DefSU, SDep::Data, DefSU->Latency, Reg); in addVRegUseDeps()
489 ST.adjustSchedDependency(DefSU, SU, const_cast<SDep &>(dep)); in addVRegUseDeps()
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DScheduleDAG.cpp65 bool SUnit::addPred(const SDep &D) { in addPred()
67 for (SmallVector<SDep, 4>::iterator I = Preds.begin(), E = Preds.end(); in addPred()
74 SDep ForwardD = *I; in addPred()
76 for (SmallVector<SDep, 4>::iterator II = PredSU->Succs.begin(), in addPred()
89 SDep P = D; in addPred()
93 if (D.getKind() == SDep::Data) { in addPred()
119 void SUnit::removePred(const SDep &D) { in removePred()
121 for (SmallVector<SDep, 4>::iterator I = Preds.begin(), E = Preds.end(); in removePred()
126 SDep P = D; in removePred()
129 for (SmallVector<SDep, 4>::iterator II = N->Succs.begin(), in removePred()
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DAggressiveAntiDepBreaker.cpp276 static void AntiDepEdges(const SUnit *SU, std::vector<const SDep*>& Edges) { in AntiDepEdges()
280 if ((P->getKind() == SDep::Anti) || (P->getKind() == SDep::Output)) { in AntiDepEdges()
293 const SDep *Next = 0; in CriticalPathStep()
305 (NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) { in CriticalPathStep()
792 std::vector<const SDep *> Edges; in BreakAntiDependencies()
811 const SDep *Edge = Edges[i]; in BreakAntiDependencies()
814 if ((Edge->getKind() != SDep::Anti) && in BreakAntiDependencies()
815 (Edge->getKind() != SDep::Output)) continue; in BreakAntiDependencies()
858 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) : in BreakAntiDependencies()
859 (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) { in BreakAntiDependencies()
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DCriticalAntiDepBreaker.cpp142 static const SDep *CriticalPathStep(const SUnit *SU) { in CriticalPathStep()
143 const SDep *Next = 0; in CriticalPathStep()
154 (NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) { in CriticalPathStep()
523 if (const SDep *Edge = CriticalPathStep(CriticalPathSU)) { in BreakAntiDependencies()
527 if (Edge->getKind() == SDep::Anti) { in BreakAntiDependencies()
549 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) : in BreakAntiDependencies()
550 (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) { in BreakAntiDependencies()
DMachineScheduler.cpp426 void releaseSucc(SUnit *SU, SDep *SuccEdge);
428 void releasePred(SUnit *SU, SDep *PredEdge);
439 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc()
467 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred()
DPostRASchedulerList.cpp176 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
585 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { in ReleaseSucc()
/external/llvm/include/llvm/CodeGen/
DScheduleDAG.h45 class SDep {
95 SDep() : Dep(0, Data) {} in SDep() function
98 SDep(SUnit *S, Kind kind, unsigned latency = 1, unsigned Reg = 0,
123 bool overlaps(const SDep &Other) const { in overlaps()
139 bool operator==(const SDep &Other) const {
144 bool operator!=(const SDep &Other) const {
245 struct isPodLike<SDep> { static const bool value = true; };
258 SmallVector<SDep, 4> Preds; // All sunit predecessors.
259 SmallVector<SDep, 4> Succs; // All sunit successors.
261 typedef SmallVector<SDep, 4>::iterator pred_iterator;
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/external/llvm/include/llvm/Target/
DTargetSubtargetInfo.h22 class SDep; variable
63 SDep& dep) const { } in adjustSchedDependency()
/external/llvm/lib/Target/Hexagon/
DHexagonVLIWPacketizer.cpp124 bool IsCallDependent(MachineInstr* MI, SDep::Kind DepType, unsigned DepReg);
125 bool PromoteToDotNew(MachineInstr* MI, SDep::Kind DepType,
289 SDep::Kind DepType, in IsCallDependent()
321 if (IsIndirectCall(MI) && (DepType == SDep::Data)) { in IsCallDependent()
331 static bool IsRegDependence(const SDep::Kind DepType) { in IsRegDependence()
332 return (DepType == SDep::Data || DepType == SDep::Anti || in IsRegDependence()
333 DepType == SDep::Output); in IsRegDependence()
1439 SDep::Kind DepType, MachineBasicBlock::iterator &MII, in PromoteToDotNew()
1442 assert (DepType == SDep::Data); in PromoteToDotNew()
3070 (PacketSU->Succs[i].getKind() == SDep::Anti) && in RestrictingDepExistInPacket()
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DHexagonMachineScheduler.h304 void releaseSucc(SUnit *SU, SDep *SuccEdge);
306 void releasePred(SUnit *SU, SDep *PredEdge);
DHexagonMachineScheduler.cpp64 void VLIWMachineScheduler::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc()
92 void VLIWMachineScheduler::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred()