Searched refs:SubReg0 (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfoImpl.cpp | 81 unsigned SubReg0 = HasDef ? MI->getOperand(0).getSubReg() : 0; in commuteInstruction() local
92 SubReg0 = SubReg2; in commuteInstruction()
97 SubReg0 = SubReg1; in commuteInstruction()
108 MI->getOperand(0).setSubReg(SubReg0); in commuteInstruction()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1449 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, MVT::i32); in PairSRegs() local
1451 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in PairSRegs()
1460 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, MVT::i32); in PairDRegs() local
1462 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in PairDRegs()
1471 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, MVT::i32); in PairQRegs() local
1473 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in PairQRegs()
1484 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, MVT::i32); in QuadSRegs() local
1488 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in QuadSRegs()
1499 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, MVT::i32); in QuadDRegs() local
1503 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in QuadDRegs()
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