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Searched refs:TCG_REG_SP (Results 1 – 2 of 2) sorted by relevance

/external/qemu/tcg/hppa/
Dtcg-target.h68 TCG_REG_SP, enumerator
80 #define TCG_REG_CALL_STACK TCG_REG_SP
Dtcg-target.c649 tcg_out_ldst(s, arg1, TCG_REG_SP, STACK_TEMP_OFS, INSN_STW); in tcg_out_xmpyu()
650 tcg_out_ldst(s, arg2, TCG_REG_SP, STACK_TEMP_OFS + 4, INSN_STW); in tcg_out_xmpyu()
656 tcg_out32(s, INSN_FLDDS | INSN_R2(TCG_REG_SP) in tcg_out_xmpyu()
664 tcg_out32(s, INSN_FSTDS | INSN_R2(TCG_REG_SP) in tcg_out_xmpyu()
669 tcg_out_ldst(s, reth, TCG_REG_SP, STACK_TEMP_OFS, INSN_LDW); in tcg_out_xmpyu()
672 tcg_out_ldst(s, retl, TCG_REG_SP, STACK_TEMP_OFS + 4, INSN_LDW); in tcg_out_xmpyu()
1201 tcg_out_st(s, TCG_TYPE_I32, argreg, TCG_REG_SP, in tcg_out_qemu_st()
1619 tcg_out_st(s, TCG_TYPE_PTR, TCG_REG_RP, TCG_REG_SP, -20); in tcg_target_qemu_prologue()
1623 TCG_REG_SP, frame_size, INSN_STWM); in tcg_target_qemu_prologue()
1628 TCG_REG_SP, -frame_size + i * 4); in tcg_target_qemu_prologue()
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