Searched refs:V5 (Results 1 – 25 of 37) sorted by relevance
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| /external/llvm/test/CodeGen/Thumb/ |
| D | ldr_ext.ll | 1 ; RUN: llc < %s -march=thumb | FileCheck %s -check-prefix=V5
7 ; V5: ldrb
16 ; V5: ldrh
25 ; V5: ldrb
26 ; V5: lsls
27 ; V5: asrs
37 ; V5: ldrh
38 ; V5: lsls
39 ; V5: asrs
49 ; V5: movs r0, #0
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.h | 36 V1, V2, V3, V4, V5 enumerator
62 bool hasV5TOps () const { return HexagonArchVersion >= V5; } in hasV5TOps()
63 bool hasV5TOpsOnly () const { return HexagonArchVersion == V5; } in hasV5TOpsOnly()
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| D | HexagonSubtarget.cpp | 57 HexagonArchVersion = V5; in HexagonSubtarget()
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| D | Hexagon.td | 31 def ArchV5 : SubtargetFeature<"v5", "HexagonArchVersion", "V5",
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| D | HexagonRegisterInfo.cpp | 66 case HexagonSubtarget::V5: in getCalleeSavedRegs()
113 case HexagonSubtarget::V5: in getCalleeSavedRegClasses()
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| /external/llvm/unittests/Support/ |
| D | AlignOfTest.cpp | 70 struct V5 : V4, V3 { double z; virtual ~V5(); }; struct
73 struct V8 : V5, virtual V6, V7 { double zz; virtual ~V8(); };
120 [AlignOf<V5>::Alignment > 0]
170 EXPECT_LE(alignOf<V1>(), alignOf<V5>()); in TEST()
252 EXPECT_EQ(alignOf<V5>(), alignOf<AlignedCharArrayUnion<V5> >()); in TEST()
317 EXPECT_EQ(sizeof(V5), sizeof(AlignedCharArrayUnion<V5>)); in TEST()
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| /external/llvm/test/Transforms/SimplifyCFG/ |
| D | PhiEliminate2.ll | 10 %V5 = sext i16 %V3 to i32 ; <i32> [#uses=1]
13 %V6 = phi i32 [ %V5, %else ], [ %V4, %then ] ; <i32> [#uses=0]
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| /external/llvm/test/MC/ARM/ |
| D | thumb-diagnostics.s | 4 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V5 < %t %s
20 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later
21 @ CHECK-ERRORS-V5: mov r2, r3
22 @ CHECK-ERRORS-V5: ^
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| /external/llvm/test/CodeGen/Hexagon/ |
| D | opt-fabs.ll | 2 ; Optimize fabsf to clrbit in V5.
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| D | fmul.ll | 2 ; Check that we generate single precision floating point multiply in V5.
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| D | dadd.ll | 2 ; Check that we generate double precision floating point add in V5.
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| D | dsub.ll | 2 ; Check that we generate double precision floating point subtract in V5.
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| D | fsub.ll | 2 ; Check that we generate sp floating point subtract in V5.
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| D | dmul.ll | 2 ; Check that we generate double precision floating point multiply in V5.
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| D | fadd.ll | 2 ; Check that we generate sp floating point add in V5.
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| D | opt-fneg.ll | 2 ; Optimize fneg to togglebit in V5.
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| D | convertsptoll.ll | 3 ; to 64-bit int value in IEEE complaint mode in V5.
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| D | convertdptoll.ll | 3 ; to 64-bit integer value in IEEE complaint mode in V5.
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| D | convertsptoint.ll | 3 ; to 32-bit int value in IEEE complaint mode in V5.
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| D | convertdptoint.ll | 3 ; to 32-bit int value in IEEE complaint mode in V5.
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| D | doubleconvert-ieee-rnd-near.ll | 3 ; to 32-bit int value in IEEE rounding to the nearest mode in V5.
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| D | fcmp.ll | 2 ; Check that we generate floating point compare in V5
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| /external/chromium/chrome/browser/importer/ |
| D | firefox_proxy_settings.cc | 53 return FirefoxProxySettings::V5; in IntToSOCKSVersion()
147 net::ProxyServer::Scheme proxy_scheme = V5 == socks_version() ? in ToProxyConfig()
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| D | firefox_proxy_settings.h | 33 V5 enumerator
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCBaseInfo.h | 36 case R5 : case X5 : case F5 : case V5 : case CR5: case CR1GT: return 5; in getPPCRegisterNumbering()
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