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Searched refs:getSubtargetImpl (Results 1 – 25 of 38) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86TargetMachine.cpp39 DataLayout(getSubtargetImpl()->isTargetDarwin() ? in X86_32TargetMachine()
42 (getSubtargetImpl()->isTargetCygMing() || in X86_32TargetMachine()
43 getSubtargetImpl()->isTargetWindows()) ? in X86_32TargetMachine()
132 return *getX86TargetMachine().getSubtargetImpl(); in getX86Subtarget()
DX86TargetMachine.h55 virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; } in getSubtargetImpl() function
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp49 TM(tm), RI(*TM.getSubtargetImpl(), *this) {} in PPCInstrInfo()
217 bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); in AnalyzeBranch()
385 bool isPPC64 = TM.getSubtargetImpl()->isPPC64(); in InsertBranch()
492 if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || in StoreRegToStackSlot()
493 (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { in StoreRegToStackSlot()
506 bool is64Bit = TM.getSubtargetImpl()->isPPC64(); in StoreRegToStackSlot()
509 unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? in StoreRegToStackSlot()
642 if ((!DisablePPC32RS && !TM.getSubtargetImpl()->isPPC64()) || in LoadRegFromStackSlot()
643 (!DisablePPC64RS && TM.getSubtargetImpl()->isPPC64())) { in LoadRegFromStackSlot()
654 unsigned ScratchReg = TM.getSubtargetImpl()->isDarwinABI() ? in LoadRegFromStackSlot()
[all …]
DPPCTargetMachine.h62 virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; } in getSubtargetImpl() function
DPPCJITInfo.cpp389 } else if (TM.getSubtargetImpl()->isDarwinABI()){ in emitFunctionStub()
/external/llvm/include/llvm/Target/
DTargetMachine.h63 virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; } in getSubtargetImpl() function
119 return *static_cast<const STC*>(getSubtargetImpl()); in getSubtarget()
/external/llvm/lib/Target/Mips/
DMipsFrameLowering.cpp87 if (TM.getSubtargetImpl()->inMips16Mode()) in create()
DMips16InstrInfo.cpp29 RI(*tm.getSubtargetImpl()) {} in Mips16InstrInfo()
DMipsTargetMachine.h55 virtual const MipsSubtarget *getSubtargetImpl() const in getSubtargetImpl() function
DMipsTargetMachine.cpp89 return *getMipsTargetMachine().getSubtargetImpl(); in getMipsSubtarget()
DMipsInstrInfo.cpp35 if (TM.getSubtargetImpl()->inMips16Mode()) in create()
/external/llvm/lib/Target/MSP430/
DMSP430TargetMachine.h51 virtual const MSP430Subtarget *getSubtargetImpl() const { return &Subtarget; } in getSubtargetImpl() function
/external/llvm/lib/Target/XCore/
DXCoreTargetMachine.h44 virtual const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; } in getSubtargetImpl() function
/external/llvm/lib/Target/CellSPU/
DSPUTargetMachine.h44 virtual const SPUSubtarget *getSubtargetImpl() const { in getSubtargetImpl() function
/external/llvm/lib/Target/Hexagon/
DHexagonTargetMachine.h47 virtual const HexagonSubtarget *getSubtargetImpl() const { in getSubtargetImpl() function
DHexagonCFGOptimizer.cpp42 QST(*TM.getSubtargetImpl()) {} in HexagonCFGOptimizer()
DHexagonSplitTFRCondSets.cpp60 MachineFunctionPass(ID), QTM(TM), QST(*TM.getSubtargetImpl()) {} in HexagonSplitTFRCondSets()
DHexagonExpandPredSpillCode.cpp52 MachineFunctionPass(ID), QTM(TM), QST(*TM.getSubtargetImpl()) {} in HexagonExpandPredSpillCode()
/external/llvm/lib/Target/MBlaze/
DMBlazeTargetMachine.h59 virtual const MBlazeSubtarget *getSubtargetImpl() const in getSubtargetImpl() function
DMBlazeInstrInfo.cpp32 TM(tm), RI(*TM.getSubtargetImpl(), *this) {} in MBlazeInstrInfo()
/external/llvm/lib/Target/NVPTX/
DNVPTXFrameLowering.cpp41 if (tm.getSubtargetImpl()->hasGenericLdSt()) { in emitPrologue()
DNVPTXTargetMachine.h62 virtual const NVPTXSubtarget *getSubtargetImpl() const { return &Subtarget;} in getSubtargetImpl() function
/external/llvm/lib/Target/Sparc/
DSparcTargetMachine.h45 virtual const SparcSubtarget *getSubtargetImpl() const{ return &Subtarget; } in getSubtargetImpl() function
/external/llvm/lib/Target/ARM/
DARMTargetMachine.h49 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; } in getSubtargetImpl() function
DARMTargetMachine.cpp122 return *getARMTargetMachine().getSubtargetImpl(); in getARMSubtarget()

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