Searched refs:imm12 (Results 1 – 8 of 8) sorted by relevance
/external/qemu/ |
D | arm-dis.c | 3359 unsigned int imm12 = 0; in print_insn_thumb32() local 3360 imm12 |= (given & 0x000000ffu); in print_insn_thumb32() 3361 imm12 |= (given & 0x00007000u) >> 4; in print_insn_thumb32() 3362 imm12 |= (given & 0x04000000u) >> 15; in print_insn_thumb32() 3363 func (stream, "#%u\t; 0x%x", imm12, imm12); in print_insn_thumb32()
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 721 // addrmode_imm12 := reg +/- imm12 789 // addrmode2 := reg +/- imm12 1443 let Inst{11-0} = addr{11-0}; // imm12 1474 let Inst{11-0} = addr{11-0}; // imm12 1506 let Inst{11-0} = addr{11-0}; // imm12 1535 let Inst{11-0} = addr{11-0}; // imm12 1697 let Inst{11-0} = addr{11-0}; // imm12 2119 let Inst{11-0} = addr{11-0}; // imm12 2178 // {11-0} imm12/Rm 2195 // {11-0} imm12/Rm [all …]
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D | ARMInstrFormats.td | 598 // {11-0} imm12/Rm 616 // {11-0} imm12/Rm 635 // {13} 1 == Rm, 0 == imm12 637 // {11-0} imm12/Rm
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D | README.txt | 505 LDR into imm12 and so_reg forms. This allows us to clean up some code. e.g.
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D | ARMInstrThumb2.td | 148 // t2addrmode_imm12 := reg + imm12 159 // t2ldrlabel := imm12 926 /// T2I_ld - Defines a set of (op r, {imm12|imm8|so_reg}) load patterns. 1006 /// T2I_st - Defines a set of (op r, {imm12|imm8|so_reg}) store patterns. 1534 let Inst{11-0} = addr{11-0}; // imm12
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/external/valgrind/main/VEX/priv/ |
D | guest_arm_toIR.c | 2357 IRExpr* mk_EA_reg_plusminus_imm12 ( UInt rN, UInt bU, UInt imm12, in mk_EA_reg_plusminus_imm12() argument 2362 vassert(imm12 < 0x1000); in mk_EA_reg_plusminus_imm12() 2364 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm12); in mk_EA_reg_plusminus_imm12() 2368 mkU32(imm12) ); in mk_EA_reg_plusminus_imm12() 11908 UInt imm12 = INSN(11,0); in decode_NV_instruction() local 11910 DIP("pld [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12); in decode_NV_instruction() 11941 UInt imm12 = INSN(11,0); in decode_NV_instruction() local 11943 DIP("pli [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12); in decode_NV_instruction() 12535 UInt imm12 = (insn >> 0) & 0xFFF; /* 11:0 */ in disInstr_ARM_WRK() local 12576 eaE = mk_EA_reg_plusminus_imm12( rN, bU, imm12, dis_buf ); in disInstr_ARM_WRK() [all …]
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/external/valgrind/main/none/tests/arm/ |
D | v6intARM.stdout.exp | 737 pld reg +/- imm12 cases 1476 pld reg +/- imm12 cases
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/external/webkit/Source/JavaScriptCore/ |
D | ChangeLog-2011-02-16 | 23700 imm12 immediate constant in load16. If it is not fit in the instruction
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