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Searched refs:imm4 (Results 1 – 7 of 7) sorted by relevance

/external/llvm/lib/Target/Mips/
DMips16InstrFormats.td292 // Format RRI-A instruction class in Mips : <|opcode|rx|ry|f|imm4|>
302 bits<4> imm4;
310 let Inst{3-0} = imm4;
450 // <|EXTEND|imm10:5|imm15:11|op|0|0|0|0|0|0|imm4:0>
501 // <|EXTEND|imm10:5|imm15:11|op|rx|0|0|0|imm4:0>
525 // <|EXTEND|imm10:5|imm15:11|op|rx|ry|imm4:0>
603 // <|EXTEND|imm10:5|imm15:11|I8|funct|0|imm4:0>
/external/valgrind/main/VEX/priv/
Dhost_arm_isel.c3190 UInt imm4; in iselNeon64Expr_wrk() local
3194 imm4 = (index << 1) + 1; in iselNeon64Expr_wrk()
3202 imm4, False in iselNeon64Expr_wrk()
3209 UInt imm4; in iselNeon64Expr_wrk() local
3213 imm4 = (index << 2) + 2; in iselNeon64Expr_wrk()
3221 imm4, False in iselNeon64Expr_wrk()
3228 UInt imm4; in iselNeon64Expr_wrk() local
3232 imm4 = (index << 3) + 4; in iselNeon64Expr_wrk()
3240 imm4, False in iselNeon64Expr_wrk()
3593 UInt imm4; in iselNeon64Expr_wrk() local
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Dhost_arm_defs.h240 UShort imm4; member
249 extern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 );
Dhost_arm_defs.c437 ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ) { in ARMRI84_I84() argument
441 ri84->ARMri84.I84.imm4 = imm4; in ARMRI84_I84()
443 vassert(imm4 >= 0 && imm4 <= 15); in ARMRI84_I84()
457 2 * ri84->ARMri84.I84.imm4)); in ppARMRI84()
2597 vassert(0 == (ri->ARMri84.I84.imm4 & ~0x0F)); in skeletal_RI84()
2600 instr |= (ri->ARMri84.I84.imm4 << 8); in skeletal_RI84()
4035 UInt imm4 = imm & 0xF; in emit_ARMInstr() local
4070 cmode, BITS4(0,Q,op,1), imm4); in emit_ARMInstr()
Dguest_arm_toIR.c2850 UInt imm4 = (theInstr >> 8) & 0xf; in dis_neon_vext() local
2856 getQReg(mreg), mkU8(imm4)), condT); in dis_neon_vext()
2859 getDRegI64(mreg), mkU8(imm4)), condT); in dis_neon_vext()
2862 reg_t, mreg, imm4); in dis_neon_vext()
2953 UInt imm4 = (theInstr >> 16) & 0xF; in dis_neon_vdup() local
2960 if ((imm4 == 0) || (imm4 == 8)) in dis_neon_vdup()
2972 if ((imm4 & 1) == 1) { in dis_neon_vdup()
2975 index = imm4 >> 1; in dis_neon_vdup()
2977 } else if ((imm4 & 3) == 2) { in dis_neon_vdup()
2980 index = imm4 >> 2; in dis_neon_vdup()
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/external/webkit/Source/JavaScriptCore/assembler/
DARMv7Assembler.h192 unsigned imm4 : 4; member
1209 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_MOV_imm_T3, imm.m_value.imm4, rd, imm); in movT3()
1234 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_MOVT, imm.m_value.imm4, rd, imm); in movt()
2181 return op | (imm.m_value.i << 10) | imm.m_value.imm4; in twoWordOp5i6Imm4Reg4EncodedImmFirst()
2243 … void twoWordOp5i6Imm4Reg4EncodedImm(OpcodeID1 op, int imm4, RegisterID rd, ARMThumbImmediate imm) in twoWordOp5i6Imm4Reg4EncodedImm() argument
2246 newImm.m_value.imm4 = imm4; in twoWordOp5i6Imm4Reg4EncodedImm()
/external/qemu/
Darm-dis.c2067 int imm4 = (given >> 4) & 0xf; in print_insn_coprocessor() local
2079 if (imm4) in print_insn_coprocessor()
2080 func (stream, ", lsl #%d", imm4); in print_insn_coprocessor()
2091 if (imm4 > 0) in print_insn_coprocessor()
2092 func (stream, ", lsl #%d", imm4); in print_insn_coprocessor()