Searched refs:isAllocatable (Results 1 – 19 of 19) sorted by relevance
74 if (!RC || RC->isAllocatable()) in getAllocatableClass()84 if (SubRC->isAllocatable()) in getAllocatableClass()118 assert(RC->isAllocatable() && "invalid for nonallocatable sets"); in getAllocatableSetForRC()135 if ((*I)->isAllocatable()) in getAllocatableSet()
125 bool isAllocatable(unsigned PhysReg) const { in isAllocatable() function
128 bool isAllocatable(unsigned reg) const { in isAllocatable() function
55 let isAllocatable = 0;
99 bool isAllocatable() const { return MC->isAllocatable(); } in isAllocatable() function
170 // isAllocatable - Specify that the register class can be used for virtual172 // model instruction operand constraints, and should have isAllocatable = 0.173 bit isAllocatable = 1;
167 if (hweight > bestPhys && LIS.isAllocatable(hint)) in CalculateWeightAndHint()
512 !RC->contains(Hint) || !RegClassInfo.isAllocatable(Hint))) in allocVirtReg()841 if (RegClassInfo.isAllocatable(*I)) in AllocateBasicBlock()973 if (!RegClassInfo.isAllocatable(Reg)) continue; in AllocateBasicBlock()1061 if (!RegClassInfo.isAllocatable(Reg)) continue; in AllocateBasicBlock()
100 assert(RegClass->isAllocatable() && in createVirtualRegister()
638 if (!RegClassInfo.isAllocatable(NewSuperReg)) continue; in FindSuitableFreeRegisters()821 if (!RegClassInfo.isAllocatable(AntiDepReg)) { in BreakAntiDependencies()
530 if (!RegClassInfo.isAllocatable(AntiDepReg)) in BreakAntiDependencies()
360 if (!lis->isAllocatable(dst)) { in build()
188 bool isAllocatable(unsigned Reg) { in isAllocatable() function484 if (isAllocatable(reg) && !MBB->isLandingPad() && in visitMachineBasicBlockBefore()
348 else if (RCI->isAllocatable(MO.getReg())) in collectOperands()
95 bool isAllocatable() const { return Allocatable; } in isAllocatable() function
143 let isAllocatable = 0;
399 let isAllocatable = 0;412 let isAllocatable = 0;416 let isAllocatable = 0;
323 let isAllocatable = 0;326 let isAllocatable = 0;
246 let isAllocatable = 0;