| /external/llvm/test/MC/ARM/ |
| D | thumb2-mclass.s | 46 msr apsr, r0
47 msr apsr_nzcvq, r0
48 msr apsr_g, r0
49 msr apsr_nzcvqg, r0
50 msr iapsr, r0
51 msr iapsr_nzcvq, r0
52 msr iapsr_g, r0
53 msr iapsr_nzcvqg, r0
54 msr eapsr, r0
55 msr eapsr_nzcvq, r0
[all …]
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| D | basic-arm-instructions.s | 1092 msr apsr, #5
1093 msr apsr_g, #5
1094 msr apsr_nzcvq, #5
1095 msr APSR_nzcvq, #5
1096 msr apsr_nzcvqg, #5
1097 msr cpsr_fc, #5
1098 msr cpsr_c, #5
1099 msr cpsr_x, #5
1100 msr cpsr_fc, #5
1101 msr cpsr_all, #5
[all …]
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| D | basic-thumb2-instructions.s | 1360 msr apsr, r1
1361 msr apsr_g, r2
1362 msr apsr_nzcvq, r3
1363 msr APSR_nzcvq, r4
1364 msr apsr_nzcvqg, r5
1365 msr cpsr_fc, r6
1366 msr cpsr_c, r7
1367 msr cpsr_x, r8
1368 msr cpsr_fc, r9
1369 msr cpsr_all, r11
[all …]
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| /external/kernel-headers/original/asm-x86/ |
| D | msr.h | 17 static inline unsigned long long native_read_msr(unsigned int msr) in native_read_msr() argument
21 asm volatile("rdmsr" : "=A" (val) : "c" (msr)); in native_read_msr()
25 static inline unsigned long long native_read_msr_safe(unsigned int msr, in native_read_msr_safe() argument
40 : "c" (msr), "i" (-EFAULT)); in native_read_msr_safe()
45 static inline void native_write_msr(unsigned int msr, unsigned long long val) in native_write_msr() argument
47 asm volatile("wrmsr" : : "c" (msr), "A"(val)); in native_write_msr()
50 static inline int native_write_msr_safe(unsigned int msr, in native_write_msr_safe() argument
64 : "c" (msr), "0" ((u32)val), "d" ((u32)(val>>32)), in native_write_msr_safe()
93 #define rdmsr(msr,val1,val2) \ argument
95 u64 __val = native_read_msr(msr); \
[all …]
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| D | paravirt.h | 117 u64 (*read_msr)(unsigned int msr, int *err);
118 int (*write_msr)(unsigned int msr, u64 val);
560 static inline u64 paravirt_read_msr(unsigned msr, int *err) in paravirt_read_msr() argument
562 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err); in paravirt_read_msr()
564 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high) in paravirt_write_msr() argument
566 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high); in paravirt_write_msr()
570 #define rdmsr(msr,val1,val2) do { \ argument
572 u64 _l = paravirt_read_msr(msr, &_err); \
577 #define wrmsr(msr,val1,val2) do { \ argument
578 paravirt_write_msr(msr, val1, val2); \
[all …]
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| /external/libgsm/src/ |
| D | decode.c | 24 register word msr = S->msr; variable
29 tmp = GSM_MULT_R( msr, 28180 );
30 msr = GSM_ADD(*s, tmp); /* Deemphasis */
31 *s = GSM_ADD(msr, msr) & 0xFFF8; /* Truncation & Upscaling */
33 S->msr = msr;
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| /external/valgrind/main/none/tests/s390x/ |
| D | mul.stdout.exp | 89 msr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000
90 msr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001
91 msr 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF
92 msr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF
93 msr 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000
94 msr 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF
95 msr 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000
96 msr 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF
97 msr FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF
98 msr 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000
[all …]
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| D | mul.c | 28 regsweep(msr, m2); in do_regmem_insns()
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| /external/oprofile/module/x86/ |
| D | op_msr.h | 19 #define wrmsr(msr, val1, val2) \ argument
23 : "c" (msr), "a" (val1), "d" (val2) \
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-MSR-MClass.txt | 3 # CHECK: msr primask, r0
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| D | basic-arm-instructions.txt | 783 # CHECK: msr CPSR_fc, #5
784 # CHECK: msr APSR_g, #5
785 # CHECK: msr APSR_nzcvq, #5
786 # CHECK: msr APSR_nzcvq, #5
787 # CHECK: msr APSR_nzcvqg, #5
788 # CHECK: msr CPSR_fc, #5
789 # CHECK: msr CPSR_c, #5
790 # CHECK: msr CPSR_x, #5
791 # CHECK: msr CPSR_fc, #5
792 # CHECK: msr CPSR_fc, #5
[all …]
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| D | thumb-tests.txt | 134 # CHECK: msr CPSR_fc, r0
299 # CHECK: msr CPSR_fc, r0
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| D | thumb2.txt | 1039 # CHECK: msr APSR_nzcvq, r1
1040 # CHECK: msr APSR_g, r2
1041 # CHECK: msr APSR_nzcvq, r3
1042 # CHECK: msr APSR_nzcvq, r4
1043 # CHECK: msr APSR_nzcvqg, r5
1044 # CHECK: msr CPSR_fc, r6
1045 # CHECK: msr CPSR_c, r7
1046 # CHECK: msr CPSR_x, r8
1047 # CHECK: msr CPSR_fc, r9
1048 # CHECK: msr CPSR_fc, r11
[all …]
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| D | arm-tests.txt | 164 # CHECK: msr CPSR_fc, r0
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| /external/qemu-pc-bios/vgabios/tests/ |
| D | testbios.c | 27 Bit16u msr; member
277 biosarea->msr=peekb(0x40,0x65); in read_bios_area()
303 printf("msr : %04x\n",biosarea->msr); in show_bios_area()
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| /external/libgsm/inc/ |
| D | private.h | 34 word msr; /* decoder.c, Postprocessing */ member
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| /external/valgrind/main/include/vki/ |
| D | vki-ppc32-linux.h | 206 unsigned long msr; member
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| D | vki-ppc64-linux.h | 200 VKI_PPC_REG msr; member
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| /external/valgrind/main/coregrind/m_coredump/ |
| D | coredump-elf.c | 305 regs->msr = 0xf032; /* pretty arbitrary */ in fill_prstatus()
326 regs->msr = 0xf032; /* pretty arbitrary */ in fill_prstatus()
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| /external/elfutils/tests/ |
| D | run-allregs.sh | 197 66: msr (msr), unsigned 32 bits
1220 66: msr (msr), unsigned 64 bits
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| /external/qemu/ |
| D | cpu-exec.c | 971 # define MSR_sig(context) REG_sig(msr, context) /* Machine State Register (Supervisor) */
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| D | Changelog | 37 - v2: properly save kvm system time msr registers (Glauber Costa)
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| D | gdbstub.c | 652 case 65: GET_REGL(env->msr); in cpu_gdb_read_register()
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| /external/v8/src/arm/ |
| D | assembler-arm.h | 918 void msr(SRegisterFieldMask fields, const Operand& src, Condition cond = al);
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| D | assembler-arm.cc | 1374 void Assembler::msr(SRegisterFieldMask fields, const Operand& src, in msr() function in v8::internal::Assembler
1387 msr(fields, Operand(ip), cond); in msr()
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