| /external/oprofile/module/x86/ |
| D | op_model_athlon.c | 20 #define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters.addrs[(c)], (l), (h));} while (0) argument
21 #define CTR_WRITE(l, msrs, c) do {wrmsr(msrs->counters.addrs[(c)], -(u32)(l), 0xffff);} while (0) argument
24 #define CTRL_READ(l, h, msrs, c) do {rdmsr(msrs->controls.addrs[(c)], (l), (h));} while (0) argument
25 #define CTRL_WRITE(l, h, msrs, c) do {wrmsr(msrs->controls.addrs[(c)], (l), (h));} while (0) argument
36 static void athlon_fill_in_addresses(struct op_msrs * const msrs) in athlon_fill_in_addresses() argument
38 msrs->counters.addrs[0] = MSR_K7_PERFCTR0; in athlon_fill_in_addresses()
39 msrs->counters.addrs[1] = MSR_K7_PERFCTR1; in athlon_fill_in_addresses()
40 msrs->counters.addrs[2] = MSR_K7_PERFCTR2; in athlon_fill_in_addresses()
41 msrs->counters.addrs[3] = MSR_K7_PERFCTR3; in athlon_fill_in_addresses()
43 msrs->controls.addrs[0] = MSR_K7_EVNTSEL0; in athlon_fill_in_addresses()
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| D | op_model_ppro.c | 20 #define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters.addrs[(c)], (l), (h));} while (0) argument
21 #define CTR_WRITE(l, msrs, c) do {wrmsr(msrs->counters.addrs[(c)], -(u32)(l), -1);} while (0) argument
24 #define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls.addrs[(c)]), (l), (h));} while (0) argument
25 #define CTRL_WRITE(l, h, msrs, c) do {wrmsr((msrs->controls.addrs[(c)]), (l), (h));} while (0) argument
36 static void ppro_fill_in_addresses(struct op_msrs * const msrs) in ppro_fill_in_addresses() argument
38 msrs->counters.addrs[0] = MSR_P6_PERFCTR0; in ppro_fill_in_addresses()
39 msrs->counters.addrs[1] = MSR_P6_PERFCTR1; in ppro_fill_in_addresses()
41 msrs->controls.addrs[0] = MSR_P6_EVNTSEL0; in ppro_fill_in_addresses()
42 msrs->controls.addrs[1] = MSR_P6_EVNTSEL1; in ppro_fill_in_addresses()
46 static void ppro_setup_ctrs(struct op_msrs const * const msrs) in ppro_setup_ctrs() argument
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| D | op_x86_model.h | 36 void (*fill_in_addresses)(struct op_msrs * const msrs);
37 void (*setup_ctrs)(struct op_msrs const * const msrs);
39 struct op_msrs const * const msrs,
41 void (*start)(struct op_msrs const * const msrs);
42 void (*stop)(struct op_msrs const * const msrs);
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| D | op_model_p4.c | 404 static void p4_fill_in_addresses(struct op_msrs * const msrs) in p4_fill_in_addresses() argument
414 msrs->counters.addrs[i] = in p4_fill_in_addresses()
423 msrs->controls.addrs[i] = addr; in p4_fill_in_addresses()
429 msrs->controls.addrs[i] = addr; in p4_fill_in_addresses()
437 msrs->controls.addrs[i] = addr; in p4_fill_in_addresses()
442 msrs->controls.addrs[i] = addr; in p4_fill_in_addresses()
448 msrs->controls.addrs[i] = addr; in p4_fill_in_addresses()
453 msrs->controls.addrs[i] = addr; in p4_fill_in_addresses()
458 msrs->controls.addrs[i] = addr; in p4_fill_in_addresses()
465 msrs->controls.addrs[i++] = MSR_P4_CRU_ESCR5; in p4_fill_in_addresses()
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| D | op_nmi.c | 49 struct op_msrs const * const msrs = &cpu_msrs[cpu]; in op_do_nmi() local
51 model->check_ctrs(cpu, msrs, regs); in op_do_nmi()
59 struct op_msrs const * const msrs = &cpu_msrs[cpu]; in pmc_setup_ctr() local
60 get_model()->setup_ctrs(msrs); in pmc_setup_ctr()
76 struct op_msrs const * const msrs = &cpu_msrs[cpu]; in pmc_start() local
81 get_model()->start(msrs); in pmc_start()
88 struct op_msrs const * const msrs = &cpu_msrs[cpu]; in pmc_stop() local
93 get_model()->stop(msrs); in pmc_stop()
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| /external/qemu/target-i386/ |
| D | kvm.c | 452 struct kvm_msr_entry *msrs = msr_data.entries; in kvm_put_msrs() local
455 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs); in kvm_put_msrs()
456 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp); in kvm_put_msrs()
457 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip); in kvm_put_msrs()
459 kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star); in kvm_put_msrs()
460 kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc); in kvm_put_msrs()
463 kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar); in kvm_put_msrs()
464 kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase); in kvm_put_msrs()
465 kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask); in kvm_put_msrs()
466 kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar); in kvm_put_msrs()
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| D | hax-windows.c | 432 int hax_sync_msr(CPUState *env, struct hax_msr_data *msrs, int set) in hax_sync_msr() argument
447 msrs, sizeof(*msrs), in hax_sync_msr()
448 msrs, sizeof(*msrs), in hax_sync_msr()
454 msrs, sizeof(*msrs), in hax_sync_msr()
455 msrs, sizeof(*msrs), in hax_sync_msr()
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| D | hax-all.c | 889 struct vmx_msr *msrs = md.entries; in hax_get_msrs() local
893 msrs[n++].entry = MSR_IA32_SYSENTER_CS; in hax_get_msrs()
894 msrs[n++].entry = MSR_IA32_SYSENTER_ESP; in hax_get_msrs()
895 msrs[n++].entry = MSR_IA32_SYSENTER_EIP; in hax_get_msrs()
896 msrs[n++].entry = MSR_IA32_TSC; in hax_get_msrs()
903 switch (msrs[i].entry) { in hax_get_msrs()
905 env->sysenter_cs = msrs[i].value; in hax_get_msrs()
908 env->sysenter_esp = msrs[i].value; in hax_get_msrs()
911 env->sysenter_eip = msrs[i].value; in hax_get_msrs()
914 env->tsc = msrs[i].value; in hax_get_msrs()
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| D | hax-darwin.c | 283 int hax_sync_msr(CPUState *env, struct hax_msr_data *msrs, int set) in hax_sync_msr() argument
291 ret = ioctl(fd, HAX_VCPU_IOCTL_SET_MSRS, msrs); in hax_sync_msr()
293 ret = ioctl(fd, HAX_VCPU_IOCTL_GET_MSRS, msrs); in hax_sync_msr()
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| D | hax-i386.h | 68 int hax_sync_msr(CPUState *env, struct hax_msr_data *msrs, int set);
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