| /external/oprofile/module/ia64/ |
| D | IA64minstate.h | 192 st8.spill [r17]=rR1, 16; /* save original r1 */ \
194 .mem.offset 0, 0; st8.spill [r16]=r2, 16; \
195 .mem.offset 8, 0; st8.spill [r17]=r3, 16; \
198 .mem.offset 0, 0; st8.spill [r16]=r12, 16; \
199 .mem.offset 8, 0; st8.spill [r17]=r13, 16; \
203 .mem.offset 0, 0; st8.spill [r16]=r14, 16; \
204 .mem.offset 8, 0; st8.spill [r17]=r15, 16; \
207 .mem.offset 0, 0; st8.spill [r16]=r8, 16; \
208 .mem.offset 8, 0; st8.spill [r17]=r9, 16; \
212 .mem.offset 0, 0; st8.spill [r16]=r10, 16; \
[all …]
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| D | oprofile_stubs.S | 95 stf.spill [sp]=f0
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| /external/libffi/src/ia64/ |
| D | unix.S | 308 stf.spill [r16] = f8, 32
309 stf.spill [r17] = f9, 32
312 stf.spill [r16] = f10, 32
313 stf.spill [r17] = f11, 32
315 stf.spill [r16] = f12, 32
316 stf.spill [r17] = f13, 32
318 stf.spill [r16] = f14, 32
319 stf.spill [r17] = f15, 24
322 st8.spill [r16] = in0, 16
324 st8.spill [r17] = in1, 16
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | 2010-05-18-LocalAllocCrash.ll | 3 ;; This test would spill %R4 before the call to zz, but it forgot to move the
4 ; 'last use' marker to the spill.
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| D | crash-O0.ll | 7 ; This function would crash RegAllocFast because it tried to spill %CPSR.
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| D | 2010-05-20-NEONSpillCrash.ll | 3 ; This test would crash the rewriter when trying to handle a spill after one of
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | aligned-spill.ll | 7 ; This function is forced to spill a double.
8 ; Verify that the spill slot is properly aligned.
33 ; Since the spill slot is only 8 bytes, technically it would be fine to only
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| D | inflate-regs.ll | 7 ; RAGreedy should split the range and use d16-d31 to avoid a spill.
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| /external/llvm/lib/CodeGen/ |
| D | Spiller.h | 30 virtual void spill(LiveRangeEdit &LRE) = 0;
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| D | RegAllocBasic.cpp | 206 spiller().spill(LRE); in spillInterferences()
265 spiller().spill(LRE); in selectOrSplit()
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| D | Spiller.cpp | 176 void spill(LiveRangeEdit &LRE) { in spill() function in __anon1b0805370311::TrivialSpiller
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| /external/llvm/lib/Target/X86/ |
| D | X86CompilationCallback_Win64.asm | 24 ; WARNING: We cannot use register spill area - we're generating stubs by hands!
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| D | README-FPStack.txt | 64 folding spill code into the instructions.
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| D | README-X86-64.txt | 172 1. We shouldn't spill the XMM registers because we only call va_arg with "int".
179 1. Conversely to the above, we shouldn't spill general registers if we only
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| /external/webkit/Source/JavaScriptCore/dfg/ |
| D | DFGJITCodeGenerator.h | 118 spill(spillMe); in allocate()
126 spill(spillMe); in fprAllocate()
204 void spill(VirtualRegister spillMe) in spill() function
221 info.spill(DataFormatJSDouble); in spill()
236 info.spill((DataFormat)(spillFormat | DataFormatJS)); in spill()
259 spill(name); in flushRegisters()
266 spill(name); in flushRegisters()
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| D | DFGGenerationInfo.h | 167 void spill(DataFormat spillFormat) in spill() function
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| /external/llvm/test/CodeGen/X86/ |
| D | 2011-10-11-SpillDead.ll | 7 ; The call to @g forces a spill of that register.
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| D | reghinting.ll | 4 ;; The registers %x and %y must both spill across the finit call.
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| D | 2008-01-08-SchedulerCrash.ll | 3 ; Test scheduling a multi-use compare. We should neither spill flags
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| D | stack-align.ll | 30 ; Use a call to force a spill.
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| /external/llvm/test/CodeGen/Thumb/ |
| D | 2011-06-16-NoGPRs.ll | 6 ; to spill them.
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| /external/llvm/test/CodeGen/CellSPU/ |
| D | immed64.ll | 27 ret i64 1311768467750121234 ;; Constant pool spill
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| /external/llvm/docs/CommandGuide/ |
| D | lli.rst | 187 **-disable-spill-fusing**
189 Disable fusing of spill code into instructions.
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| /external/valgrind/main/docs/internals/ |
| D | register-uses.txt | 80 r30 y altivec spill temporary
190 r30 y altivec spill temporary
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| /external/llvm/lib/Target/ARM/ |
| D | README-Thumb.txt | 18 temporaries to spill values into.
187 These instructions preserve the condition code which is important if the spill
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