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Searched refs:sra (Results 1 – 25 of 62) sorted by relevance

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/external/llvm/test/MC/MBlaze/
Dmblaze_shift.s39 # CHECK: sra
42 sra r1, r2
/external/llvm/test/CodeGen/Mips/
Datomic.ll100 ; CHECK: sra $2, $[[R17]], 24
131 ; CHECK: sra $2, $[[R17]], 24
163 ; CHECK: sra $2, $[[R17]], 24
192 ; CHECK: sra $2, $[[R17]], 24
227 ; CHECK: sra $2, $[[R17]], 24
Dsra1.ll10 ; 16: sra ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}}
/external/llvm/test/MC/Mips/
Dmips-alu-instructions.s26 # CHECK: sra $4, $3, 7 # encoding: [0xc3,0x21,0x03,0x00]
53 sra $4, $3, 7
/external/v8/test/cctest/
Dtest-disasm-mips.cc261 COMPARE(sra(a0, a1, 0), in TEST()
263 COMPARE(sra(s0, s1, 8), in TEST()
265 COMPARE(sra(t2, t3, 24), in TEST()
267 COMPARE(sra(v0, v1, 31), in TEST()
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td222 [(set GR8:$dst, (sra GR8:$src1, CL))],
226 [(set GR16:$dst, (sra GR16:$src1, CL))],
230 [(set GR32:$dst, (sra GR32:$src1, CL))],
234 [(set GR64:$dst, (sra GR64:$src1, CL))],
240 [(set GR8:$dst, (sra GR8:$src1, (i8 imm:$src2)))],
244 [(set GR16:$dst, (sra GR16:$src1, (i8 imm:$src2)))],
249 [(set GR32:$dst, (sra GR32:$src1, (i8 imm:$src2)))],
254 [(set GR64:$dst, (sra GR64:$src1, (i8 imm:$src2)))],
260 [(set GR8:$dst, (sra GR8:$src1, (i8 1)))],
264 [(set GR16:$dst, (sra GR16:$src1, (i8 1)))],
[all …]
/external/webkit/Source/cmake/
DWebKitHelpers.cmake11 # GCC 4.5.1 does not implement -ftree-sra correctly
14 SET(OLD_COMPILE_FLAGS "${OLD_COMPILE_FLAGS} -fno-tree-sra")
/external/kernel-headers/original/asm-mips/
Dasm.h266 #define INT_SRA sra
303 #define LONG_SRA sra
352 #define PTR_SRA sra
/external/llvm/test/MC/Disassembler/MBlaze/
Dmblaze_shift.txt25 # CHECK: sra r1, r2
/external/libffi/src/alpha/
Dosf.S214 sra $0, 56, $0
239 sra $0, 48, $0
/external/llvm/test/CodeGen/X86/
Dblend-msb.ll5 ; shifting the needed bit to the MSB, and not using shl+sra.
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td485 [shl, srl, sra, rotr]> {
496 [shl, srl, sra, rotr]> {
507 [shl,srl,sra,rotr]> {
518 [shl,srl,sra,rotr]> {
3602 (sra GPR:$Rm, (i32 16))))]>,
3607 [(set GPR:$Rd, (opnode (sra GPR:$Rn, (i32 16)),
3613 [(set GPR:$Rd, (opnode (sra GPR:$Rn, (i32 16)),
3614 (sra GPR:$Rm, (i32 16))))]>,
3619 [(set GPR:$Rd, (sra (opnode GPR:$Rn,
3625 [(set GPR:$Rd, (sra (opnode GPR:$Rn,
[all …]
DARMInstrThumb2.td47 [shl,srl,sra,rotr]> {
2162 BinOpFrag<(sra node:$LHS, node:$RHS)>>;
2533 (sra rGPR:$Rm, (i32 16))))]>,
2545 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2558 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2559 (sra rGPR:$Rm, (i32 16))))]>,
2571 [(set rGPR:$Rd, (sra (opnode rGPR:$Rn,
2584 [(set rGPR:$Rd, (sra (opnode rGPR:$Rn,
2585 (sra rGPR:$Rm, (i32 16))), (i32 16)))]>,
2616 (sra rGPR:$Rm, (i32 16)))))]>,
[all …]
/external/llvm/test/Transforms/GlobalOpt/
Dglobalsra-unknown-index.ll6 ; globalopt should not sra the global, because it can't see the index.
/external/openssl/crypto/bn/asm/
Ds390x.S30 sra %r4,2 // cnt=len/4
105 sra %r4,2 // cnt=len/4
234 sra %r5,2 // len/4, use sra because it sets condition code
288 sra %r5,2 // len/4, use sra because it sets condition code
Dsparcv8plus.S178 sra %o2,%g0,%o2 ! signx %o2
280 sra %o2,%g0,%o2 ! signx %o2
368 sra %o2,%g0,%o2 ! signx %o2
473 sra %o3,%g0,%o3 ! signx %o3
551 sra %o3,%g0,%o3 ! signx %o3
/external/llvm/lib/Target/NVPTX/
DNVPTXVector.td403 def ShiftRAV2I64 : VecShiftOp<V2AsmStr<"shr.s64">, sra, V2I64Regs, V2I32Regs,
405 def ShiftRAV2I32 : VecShiftOp<V2AsmStr<"shr.s32">, sra, V2I32Regs, V2I32Regs,
407 def ShiftRAV4I32 : VecShiftOp<V4AsmStr<"shr.s32">, sra, V4I32Regs, V4I32Regs,
409 def ShiftRAV2I16 : VecShiftOp<V2AsmStr<"shr.s16">, sra, V2I16Regs, V2I32Regs,
411 def ShiftRAV4I16 : VecShiftOp<V4AsmStr<"shr.s16">, sra, V4I16Regs, V4I32Regs,
413 def ShiftRAV2I8 : VecShiftOp<V2AsmStr<"shr.s16">, sra, V2I8Regs, V2I32Regs,
415 def ShiftRAV4I8 : VecShiftOp<V4AsmStr<"shr.s16">, sra, V4I8Regs, V4I32Regs,
451 def : Pat<(sra V2I16Regs:$src1, V2I16Regs:$src2),
453 def : Pat<(sra V2I8Regs:$src1, V2I8Regs:$src2),
455 def : Pat<(sra V2I64Regs:$src1, V2I64Regs:$src2),
[all …]
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.td304 def SraX16: FEXT_SHIFT16_ins<0b11, "sra", IIAlu>;
377 def: ArithLogicI16_pat<sra, immZExt5, SraX16>;
384 def: shift_rotate_reg16_pat<sra, SravRxRy16>;
DMips64InstrInfo.td108 def DSRA : shift_rotate_imm64<0x3b, 0x00, "dsra", sra>;
111 def DSRAV : shift_rotate_reg<0x17, 0x00, "dsrav", sra, CPU64Regs>;
115 def DSRA32 : shift_rotate_imm64<0x3f, 0x00, "dsra32", sra>;
/external/v8/src/mips/
Dcode-stubs-mips.cc468 __ sra(source_, source_, kSmiTagSize); in Generate() local
524 __ sra(scratch1, a0, kSmiTagSize); in LoadSmis() local
527 __ sra(scratch1, a1, kSmiTagSize); in LoadSmis() local
1245 __ sra(at, rhs, kSmiTagSize); in EmitSmiNonsmiComparison() local
1284 __ sra(at, lhs, kSmiTagSize); in EmitSmiNonsmiComparison() local
1591 __ sra(mask, mask, kSmiTagSize + 1); in GenerateLookupNumberStringCache() local
1643 __ sra(scratch, object, 1); // Shift away the tag. in GenerateLookupNumberStringCache() local
1695 __ sra(a1, a1, 1); in Generate() local
1696 __ sra(a0, a0, 1); in Generate() local
2411 __ sra(scratch1, scratch1, 31); in GenerateSmiSmiOperation() local
[all …]
Dic-mips.cc610 __ sra(a0, a2, kSmiTagSize); in GenerateMegamorphic() local
1005 __ sra(a2, a0, kSmiTagSize); in GenerateGeneric() local
1034 __ sra(a3, a2, KeyedLookupCache::kMapHashShift); in GenerateGeneric() local
1036 __ sra(at, t0, String::kHashShift); in GenerateGeneric() local
Dbuiltins-mips.cc229 __ sra(scratch1, array_size, kSmiTagSize); in AllocateJSArray() local
1381 __ sra(a0, a0, kSmiTagSize); // Un-tag. in Generate_FunctionCall() local
1484 __ sra(a2, a2, kSmiTagSize); in Generate_FunctionCall() local
1630 __ sra(a0, a0, kSmiTagSize); in Generate_FunctionApply() local
/external/openssl/crypto/
Dsparccpuid.S202 sra %i2,%g0,%i0
215 sra %o0,%g0,%o0 ! we return signed int, remember?
/external/llvm/lib/Target/CellSPU/
DREADME.txt74 * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed
/external/grub/
DTHANKS110 Taketo Kabe <kabe@sra-tohoku.co.jp>

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