Home
last modified time | relevance | path

Searched refs:src1 (Results 1 – 25 of 144) sorted by relevance

123456

/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.td156 (ins IntRegs:$src1, IntRegs:$src2),
157 "$dst = add($src1, $src2)",
158 [(set (i32 IntRegs:$dst), (add (i32 IntRegs:$src1),
163 (ins IntRegs:$src1, s16Imm:$src2),
164 "$dst = add($src1, #$src2)",
165 [(set (i32 IntRegs:$dst), (add (i32 IntRegs:$src1),
171 (ins IntRegs:$src1, IntRegs:$src2),
172 "$dst = xor($src1, $src2)",
173 [(set (i32 IntRegs:$dst), (xor (i32 IntRegs:$src1),
178 (ins IntRegs:$src1, IntRegs:$src2),
[all …]
DHexagonIntrinsicsV5.td2 : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
3 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
4 [(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
7 : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
8 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
9 [(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
12 : SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
13 !strconcat("$dst = ", !strconcat(opc , "($src1)")),
14 [(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
17 : SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1),
[all …]
DHexagonInstrInfoV5.td14 def CONST64_Float_Real : LDInst<(outs DoubleRegs:$dst), (ins f64imm:$src1),
15 "$dst = CONST64(#$src1)",
16 [(set DoubleRegs:$dst, fpimm:$src1)]>,
20 def CONST32_Float_Real : LDInst<(outs IntRegs:$dst), (ins f32imm:$src1),
21 "$dst = CONST32(#$src1)",
22 [(set IntRegs:$dst, fpimm:$src1)]>,
30 def TFRI_f : ALU32_ri<(outs IntRegs:$dst), (ins f32imm:$src1),
31 "$dst = ##$src1",
32 [(set IntRegs:$dst, fpimm:$src1)]>,
36 (ins PredRegs:$src1, f32imm:$src2),
[all …]
DHexagonIntrinsics.td21 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
22 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
23 [(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
26 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, s10Imm:$src2),
27 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
28 [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
31 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2),
32 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
33 [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
36 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, u8Imm:$src2),
[all …]
DHexagonInstrInfoV4.td88 (ins PredRegs:$src1, IntRegs:$src2),
89 "if ($src1) $dst = aslh($src2)",
95 (ins PredRegs:$src1, IntRegs:$src2),
96 "if (!$src1) $dst = aslh($src2)",
102 (ins PredRegs:$src1, IntRegs:$src2),
103 "if ($src1.new) $dst = aslh($src2)",
109 (ins PredRegs:$src1, IntRegs:$src2),
110 "if (!$src1.new) $dst = aslh($src2)",
116 (ins PredRegs:$src1, IntRegs:$src2),
117 "if ($src1) $dst = asrh($src2)",
[all …]
DHexagonInstrInfoV3.td48 def JMPR_cdnPt_V3: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
49 "if ($src1.new) jumpr:t $src2",
56 def JMPR_cdnNotPt_V3: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
57 "if (!$src1.new) jumpr:t $src2",
65 def JMPR_cdnPnt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
66 "if ($src1.new) jumpr:nt $src2",
73 def JMPR_cdnNotPnt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
74 "if (!$src1.new) jumpr:nt $src2",
87 def MAXw_dd : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1,
89 "$dst = max($src2, $src1)",
[all …]
DHexagonIntrinsicsV4.td21 : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
22 !strconcat("$dst = ", !strconcat(opc , "($src1, ~$src2)")),
23 [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
26 : ALU32_rr<(outs DoubleRegs:$dst), (ins s8Imm:$src1, IntRegs:$src2),
27 !strconcat("$dst = ", !strconcat(opc , "(#$src1, $src2)")),
28 [(set DoubleRegs:$dst, (IntID imm:$src1, IntRegs:$src2))]>;
31 : ALU32_rr<(outs DoubleRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2),
32 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
33 [(set DoubleRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
36 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
[all …]
/external/opencv/cxcore/src/
Dcxcmp.cpp57 worktype a1 = _toggle_macro_(src1[x]), \
67 worktype a1 = _toggle_macro_(src1[x*2]), \
70 a1 = _toggle_macro_(src1[x*2+1]); \
81 worktype a1 = _toggle_macro_(src1[x*3]), \
84 a1 = _toggle_macro_(src1[x*3+1]); \
88 a1 = _toggle_macro_(src1[x*3+2]); \
99 worktype a1 = _toggle_macro_(src1[x*4]), \
102 a1 = _toggle_macro_(src1[x*4+1]); \
106 a1 = _toggle_macro_(src1[x*4+2]); \
110 a1 = _toggle_macro_(src1[x*4+3]); \
[all …]
Dcxarithm.cpp60 worktype t0 = __op__((src1)[i], (src2)[i]); \
61 worktype t1 = __op__((src1)[i+1], (src2)[i+1]); \
66 t0 = __op__((src1)[i+2],(src2)[i+2]); \
67 t1 = __op__((src1)[i+3],(src2)[i+3]); \
75 worktype t0 = __op__((src1)[i],(src2)[i]); \
82 ( const type* src1, int step1, const type* src2, int step2, \
84 (src1, step1, src2, step2, dst, step, size) ) \
86 step1/=sizeof(src1[0]); step2/=sizeof(src2[0]); step/=sizeof(dst[0]); \
90 for( ; size.height--; src1 += step1, src2 += step2, dst += step ) \
92 worktype t0 = __op__((src1)[0],(src2)[0]); \
[all …]
Dcxlogic.cpp63 ( const uchar* src1, int step1, const uchar* src2, int step2, \
64 uchar* dst, int step, CvSize size ), (src1, step1, src2, step2, dst, step, size) )\
66 for( ; size.height--; src1 += step1, src2 += step2, dst += step ) \
70 if( (((size_t)src1 | (size_t)src2 | (size_t)dst) & 3) == 0 ) \
74 int t0 = __op__(((const int*)(src1+i))[0], ((const int*)(src2+i))[0]);\
75 int t1 = __op__(((const int*)(src1+i))[1], ((const int*)(src2+i))[1]);\
80 t0 = __op__(((const int*)(src1+i))[2], ((const int*)(src2+i))[2]); \
81 t1 = __op__(((const int*)(src1+i))[3], ((const int*)(src2+i))[3]); \
89 int t = __op__(*(const int*)(src1+i), *(const int*)(src2+i)); \
96 int t = __op__(((const uchar*)src1)[i],((const uchar*)src2)[i]); \
[all …]
/external/qemu/target-i386/
Dhelper_template.h58 target_long src1, src2; in glue() local
59 src1 = CC_SRC; in glue()
61 cf = (DATA_TYPE)CC_DST < (DATA_TYPE)src1; in glue()
63 af = (CC_DST ^ src1 ^ src2) & 0x10; in glue()
66 of = lshift((src1 ^ src2 ^ -1) & (src1 ^ CC_DST), 12 - DATA_BITS) & CC_O; in glue()
73 target_long src1; in glue() local
74 src1 = CC_SRC; in glue()
75 cf = (DATA_TYPE)CC_DST < (DATA_TYPE)src1; in glue()
82 target_long src1, src2; in glue() local
83 src1 = CC_SRC; in glue()
[all …]
/external/llvm/lib/Target/X86/
DX86InstrXOP.td93 (ins VR128:$src1, VR128:$src2),
94 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
95 [(set VR128:$dst, (Int VR128:$src1, VR128:$src2))]>, VEX_4VOp3;
97 (ins VR128:$src1, i128mem:$src2),
98 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
100 (Int VR128:$src1, (bitconvert (memopv2i64 addr:$src2))))]>,
103 (ins i128mem:$src1, VR128:$src2),
104 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
106 (Int (bitconvert (memopv2i64 addr:$src1)), VR128:$src2))]>,
127 (ins VR128:$src1, i8imm:$src2),
[all …]
DX86InstrFMA.td18 let Constraints = "$src1 = $dst" in {
25 (ins VR128:$src1, VR128:$src2, VR128:$src3),
29 VR128:$src1, VR128:$src3)))]>;
33 (ins VR128:$src1, VR128:$src2, f128mem:$src3),
36 [(set VR128:$dst, (OpVT128 (Op VR128:$src2, VR128:$src1,
41 (ins VR256:$src1, VR256:$src2, VR256:$src3),
44 [(set VR256:$dst, (OpVT256 (Op VR256:$src2, VR256:$src1,
49 (ins VR256:$src1, VR256:$src2, f256mem:$src3),
53 (OpVT256 (Op VR256:$src2, VR256:$src1,
56 } // Constraints = "$src1 = $dst"
[all …]
DX86InstrShiftRotate.td18 let Constraints = "$src1 = $dst" in {
20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
22 [(set GR8:$dst, (shl GR8:$src1, CL))], IIC_SR>;
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize;
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
28 [(set GR32:$dst, (shl GR32:$src1, CL))], IIC_SR>;
29 def SHL64rCL : RI<0xD3, MRM4r, (outs GR64:$dst), (ins GR64:$src1),
31 [(set GR64:$dst, (shl GR64:$src1, CL))], IIC_SR>;
34 def SHL8ri : Ii8<0xC0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2),
[all …]
DX86InstrSSE.td147 def rr : SI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
150 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
151 [(set RC:$dst, (OpNode RC:$src1, RC:$src2))], itins.rr>;
153 def rm : SI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
156 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
157 [(set RC:$dst, (OpNode RC:$src1, (load addr:$src2)))], itins.rm>;
166 def rr_Int : SI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
169 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
172 RC:$src1, RC:$src2))], itins.rr>;
173 def rm_Int : SI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, memopr:$src2),
[all …]
DX86InstrCompiler.td440 (outs GR8:$dst), (ins GR8:$src1, GR8:$src2, i8imm:$cond),
442 [(set GR8:$dst, (X86cmov GR8:$src1, GR8:$src2,
447 (outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$cond),
450 (X86cmov GR32:$src1, GR32:$src2, imm:$cond, EFLAGS))]>;
452 (outs GR16:$dst), (ins GR16:$src1, GR16:$src2, i8imm:$cond),
455 (X86cmov GR16:$src1, GR16:$src2, imm:$cond, EFLAGS))]>;
458 (ins RFP32:$src1, RFP32:$src2, i8imm:$cond),
461 (X86cmov RFP32:$src1, RFP32:$src2, imm:$cond,
465 (ins RFP64:$src1, RFP64:$src2, i8imm:$cond),
468 (X86cmov RFP64:$src1, RFP64:$src2, imm:$cond,
[all …]
DX86InstrArithmetic.td131 let Constraints = "$src1 = $dst" in {
135 def IMUL16rr : I<0xAF, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1,GR16:$src2),
138 (X86smul_flag GR16:$src1, GR16:$src2))], IIC_IMUL16_RR>,
140 def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),
143 (X86smul_flag GR32:$src1, GR32:$src2))], IIC_IMUL32_RR>,
146 (ins GR64:$src1, GR64:$src2),
149 (X86smul_flag GR64:$src1, GR64:$src2))], IIC_IMUL64_RR>,
155 (ins GR16:$src1, i16mem:$src2),
158 (X86smul_flag GR16:$src1, (load addr:$src2)))],
162 (ins GR32:$src1, i32mem:$src2),
[all …]
/external/qemu/target-arm/
Dneon_helper.c157 #define NEON_USAT(dest, src1, src2, type) do { \ argument
158 uint32_t tmp = (uint32_t)src1 + (uint32_t)src2; \
165 #define NEON_FN(dest, src1, src2) NEON_USAT(dest, src1, src2, uint8_t) argument
168 #define NEON_FN(dest, src1, src2) NEON_USAT(dest, src1, src2, uint16_t) argument
183 uint64_t HELPER(neon_qadd_u64)(uint64_t src1, uint64_t src2) in HELPER()
187 res = src1 + src2; in HELPER()
188 if (res < src1) { in HELPER()
195 #define NEON_SSAT(dest, src1, src2, type) do { \ argument
196 int32_t tmp = (uint32_t)src1 + (uint32_t)src2; \
207 #define NEON_FN(dest, src1, src2) NEON_SSAT(dest, src1, src2, int8_t) argument
[all …]
/external/kernel-headers/original/linux/
Dbitmap.h160 static inline void bitmap_and(unsigned long *dst, const unsigned long *src1, in bitmap_and() argument
164 *dst = *src1 & *src2; in bitmap_and()
166 __bitmap_and(dst, src1, src2, nbits); in bitmap_and()
169 static inline void bitmap_or(unsigned long *dst, const unsigned long *src1, in bitmap_or() argument
173 *dst = *src1 | *src2; in bitmap_or()
175 __bitmap_or(dst, src1, src2, nbits); in bitmap_or()
178 static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1, in bitmap_xor() argument
182 *dst = *src1 ^ *src2; in bitmap_xor()
184 __bitmap_xor(dst, src1, src2, nbits); in bitmap_xor()
187 static inline void bitmap_andnot(unsigned long *dst, const unsigned long *src1, in bitmap_andnot() argument
[all …]
/external/llvm/test/CodeGen/X86/
Davx-unpack.ll4 define <8 x float> @unpackhips(<8 x float> %src1, <8 x float> %src2) nounwind uwtable readnone ssp {
6 …%shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 2, i32 10, i32 3, …
11 define <4 x double> @unpackhipd(<4 x double> %src1, <4 x double> %src2) nounwind uwtable readnone s…
13 …%shuffle.i = shufflevector <4 x double> %src1, <4 x double> %src2, <4 x i32> <i32 1, i32 5, i32 3,…
18 define <8 x float> @unpacklops(<8 x float> %src1, <8 x float> %src2) nounwind uwtable readnone ssp {
20 …%shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 0, i32 8, i32 1, i…
25 define <4 x double> @unpacklopd(<4 x double> %src1, <4 x double> %src2) nounwind uwtable readnone s…
27 …%shuffle.i = shufflevector <4 x double> %src1, <4 x double> %src2, <4 x i32> <i32 0, i32 4, i32 2,…
32 define <8 x float> @unpacklops-not(<8 x float> %src1, <8 x float> %src2) nounwind uwtable readnone …
34 …%shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 0, i32 8, i32 1, i…
[all …]
Davx2-unpack.ll4 define <8 x i32> @unpackhidq1(<8 x i32> %src1, <8 x i32> %src2) nounwind uwtable readnone ssp {
6 …%shuffle.i = shufflevector <8 x i32> %src1, <8 x i32> %src2, <8 x i32> <i32 2, i32 10, i32 3, i32 …
11 define <4 x i64> @unpackhiqdq1(<4 x i64> %src1, <4 x i64> %src2) nounwind uwtable readnone ssp {
13 …%shuffle.i = shufflevector <4 x i64> %src1, <4 x i64> %src2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
18 define <8 x i32> @unpacklodq1(<8 x i32> %src1, <8 x i32> %src2) nounwind uwtable readnone ssp {
20 …%shuffle.i = shufflevector <8 x i32> %src1, <8 x i32> %src2, <8 x i32> <i32 0, i32 8, i32 1, i32 9…
25 define <4 x i64> @unpacklqdq1(<4 x i64> %src1, <4 x i64> %src2) nounwind uwtable readnone ssp {
27 …%shuffle.i = shufflevector <4 x i64> %src1, <4 x i64> %src2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
32 define <16 x i16> @unpackhwd(<16 x i16> %src1, <16 x i16> %src2) nounwind uwtable readnone ssp {
34 …%shuffle.i = shufflevector <16 x i16> %src1, <16 x i16> %src2, <16 x i32> <i32 4, i32 20, i32 5, i…
[all …]
/external/bison/lib/
Dvbitset.c502 vbitset_and (bitset dst, bitset src1, bitset src2) in vbitset_and() argument
512 vbitset_resize (dst, max (BITSET_SIZE_ (src1), BITSET_SIZE_ (src2))); in vbitset_and()
515 ssize1 = VBITSET_SIZE (src1); in vbitset_and()
518 src1p = VBITSET_WORDS (src1); in vbitset_and()
529 vbitset_and_cmp (bitset dst, bitset src1, bitset src2) in vbitset_and_cmp() argument
540 vbitset_resize (dst, max (BITSET_SIZE_ (src1), BITSET_SIZE_ (src2))); in vbitset_and_cmp()
543 ssize1 = VBITSET_SIZE (src1); in vbitset_and_cmp()
546 src1p = VBITSET_WORDS (src1); in vbitset_and_cmp()
582 vbitset_andn (bitset dst, bitset src1, bitset src2) in vbitset_andn() argument
592 vbitset_resize (dst, max (BITSET_SIZE_ (src1), BITSET_SIZE_ (src2))); in vbitset_andn()
[all …]
Dbitset_stats.c460 bitset_stats_and (bitset dst, bitset src1, bitset src2) in bitset_stats_and() argument
462 BITSET_CHECK3_ (dst, src1, src2); in bitset_stats_and()
463 BITSET_AND_ (dst->s.bset, src1->s.bset, src2->s.bset); in bitset_stats_and()
468 bitset_stats_and_cmp (bitset dst, bitset src1, bitset src2) in bitset_stats_and_cmp() argument
470 BITSET_CHECK3_ (dst, src1, src2); in bitset_stats_and_cmp()
471 return BITSET_AND_CMP_ (dst->s.bset, src1->s.bset, src2->s.bset); in bitset_stats_and_cmp()
476 bitset_stats_andn (bitset dst, bitset src1, bitset src2) in bitset_stats_andn() argument
478 BITSET_CHECK3_ (dst, src1, src2); in bitset_stats_andn()
479 BITSET_ANDN_ (dst->s.bset, src1->s.bset, src2->s.bset); in bitset_stats_andn()
484 bitset_stats_andn_cmp (bitset dst, bitset src1, bitset src2) in bitset_stats_andn_cmp() argument
[all …]
/external/opencv/cv/src/
D_cvmatrix.h63 #define icvAddMatrix_32f( src1, src2, dst, w, h ) \ argument
64 icvAddVector_32f( (src1), (src2), (dst), (w)*(h))
66 #define icvSubMatrix_32f( src1, src2, dst, w, h ) \ argument
67 icvSubVector_32f( (src1), (src2), (dst), (w)*(h))
91 CV_INLINE double icvDotProduct_32f( const float* src1, const float* src2, int len ) in icvDotProduct_32f() argument
94 for( int i = 0; i < len; i++ ) s += src1[i]*src2[i]; in icvDotProduct_32f()
102 CV_INLINE double icvDotProduct_64f( const double* src1, const double* src2, int len ) in icvDotProduct_64f() argument
105 for( int i = 0; i < len; i++ ) s += src1[i]*src2[i]; in icvDotProduct_64f()
113 CV_INLINE void icvMulVectors_32f( const float* src1, const float* src2, in icvMulVectors_32f() argument
118 dst[i] = src1[i] * src2[i]; in icvMulVectors_32f()
[all …]
Dcvderiv.cpp575 const int *src0 = src[-1], *src1 = src[0], *src2 = src[1]; in icvLaplaceCol_32s16s() local
580 int s0 = src0[i] - src1[i]*2 + src2[i] + src1[i+width]; in icvLaplaceCol_32s16s()
581 int s1 = src0[i+1] - src1[i+1]*2 + src2[i+1] + src1[i+width+1]; in icvLaplaceCol_32s16s()
586 dst[i] = (short)(src0[i] - src1[i]*2 + src2[i] + src1[i+width]); in icvLaplaceCol_32s16s()
591 int s0 = src0[i] - src1[i]*2 + src2[i] + in icvLaplaceCol_32s16s()
592 src0[i+width] + src1[i+width]*2 + src2[i+width]; in icvLaplaceCol_32s16s()
593 int s1 = src0[i+1] - src1[i+1]*2 + src2[i+1] + in icvLaplaceCol_32s16s()
594 src0[i+width+1] + src1[i+width+1]*2 + src2[i+width+1]; in icvLaplaceCol_32s16s()
600 int s0 = CV_DESCALE(src0[i] - src1[i]*2 + src2[i] + in icvLaplaceCol_32s16s()
601 src0[i+width] + src1[i+width]*2 + src2[i+width], 2); in icvLaplaceCol_32s16s()
[all …]

123456