sse2 (reference) in projects: external - OpenGrok search results

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched refs:sse2 (Results 1 – 25 of 223) sorted by relevance

12 3 4 5 6 7 8 9

/external/llvm/test/CodeGen/X86/
D	vec_shuffle-16.ll	`1 ; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse,-sse2 -mtriple=i386-apple-darwin \| FileCheck %s… 2 …N: llc < %s -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i386-apple-darwin \| FileCheck %s -check-… 5 ; sse2: t1: 8 ; sse2: pshufd 9 ; sse2-NEXT: ret 15 ; sse2: t2: 18 ; sse2: pshufd 19 ; sse2-NEXT: ret 25 ; sse2: t3: 28 ; sse2: pshufd [all …]`
D	pic-load-remat.ll	1 ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic \| grep psllw \| grep pb 8 …%tmp4403 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> zeroinitializer, <8 x i16> zeroin… 9 …%tmp4443 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> zeroinitializer, <8 x i16> zeroin… 10 …%tmp4609 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> zeroinitializer, <8 x i16> bitcast… 12 …%tmp4658 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4651, <8 x i16> bitcast (<4 x … 13 …%tmp4669 = tail call <8 x i16> @llvm.x86.sse2.pavg.w( <8 x i16> < i16 -23170, i16 -23170, i16 -231… 14 …%tmp4679 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4669, <8 x i16> %tmp4669 ) no… 16 …%tmp4700 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4689, <8 x i16> zeroinitializ… 19 …%tmp4779 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4772, <8 x i16> bitcast (<4 x … 21 …%tmp4821 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4810, <8 x i16> zeroinitializ… [all …]
D	vec_shift3.ll	1 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep psllq 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep psraw 3 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep movd \| count 2 7 …%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone … 13 …%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; … 20 …%tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone… 25 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone 26 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone
D	vec_shift.ll	1 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep psllw 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep psrlq 3 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep psraw 9 …%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind rea… 19 …%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 ) ; <<8 x i16… 24 declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone 28 …%tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone… 32 declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone 34 declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
D	barrier-sse.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep sfence 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep lfence 3 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep mfence 4 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep MEMBARRIER`
D	2007-05-17-ShuffleISelBug.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep punpckhwd 4 declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) 6 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) 15 …%tmp838 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp832, <8 x i16> < i16 8, i16 und… 16 …%tmp1020 = tail call <16 x i8> @llvm.x86.sse2.packuswb.128( <8 x i16> zeroinitializer, <8 x i16> %…`
D	maskmovdqu.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep -i EDI 2 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 \| grep -i RDI 7 tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, i8* %c ) 11 declare void @llvm.x86.sse2.maskmov.dqu(<16 x i8>, <16 x i8>, i8*) nounwind`
D	vec_shift2.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep CPI 5 …%tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> <… 12 …%tmp2 = tail call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp1, <4 x i32> < i32 14, i32 undef,… 16 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone 17 declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone`
D	avx-intrinsics-x86_64.ll	5 %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1] 8 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone 13 …%res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#u… 16 declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone 21 %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1] 24 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
D	vec_shuffle-11.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin \| not grep mov 5 …%tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; … 11 declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32)`
D	illegal-vector-args-return.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem \| grep "mulpd %xmm3, %xmm1" 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem \| grep "mulpd %xmm2, %xmm0" 3 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem \| grep "addps %xmm3, %xmm1" 4 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem \| grep "addps %xmm2, %xmm0"`
D	avx-intrinsics-x86.ll	53 …%res = call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>… 56 declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone 61 …%res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d… 64 declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone 69 …%res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d… 72 declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone 79 %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] 82 declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone 89 %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] 92 declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>) nounwind readnone [all …]
D	lfence.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep lfence 3 declare void @llvm.x86.sse2.lfence() nounwind 6 call void @llvm.x86.sse2.lfence()`
D	mfence.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep sfence 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep lfence 3 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep mfence`
D	vec_set-C.ll	`1 ; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 \| grep movq 2 ; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+sse2 \| grep mov \| count 1 3 ; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux -mattr=+sse2 \| grep movd`
D	vec_shuffle-14.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep movd \| count 1 3 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 \| grep movd \| count 2 4 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 \| grep movq \| count 3 5 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| not grep xor`
D	2007-06-28-X86-64-isel.ll	`1 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 4 …%tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x … 16 declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>)`
D	2008-09-05-sinttofp-2xi32.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx \| not grep unpcklpd 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx \| not grep unpckhpd 3 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep cvttpd2pi \| count 1 4 ; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep cvtpi2pd \| count 1`
D	commute-intrinsic.ll	`1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static \| not grep movaps 10 …%tmp11 = tail call <4 x i32> @llvm.x86.sse2.pmadd.wd( <8 x i16> %tmp9, <8 x i16> %tmp6 ) nounwind … 15 declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnone`
D	vec_set-F.ll	`1 ; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 \| grep movq 2 ; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 \| grep movsd 3 ; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 \| grep mov \| count 3`
D	2009-02-25-CommuteBug.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 \| not grep commuted 9 …%0 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %A, <2 x double> %tmp3.i) nounwind … 14 declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone`
/external/valgrind/main/memcheck/tests/amd64/
D	xor-undef-amd64.stdout.exp	`14 Complain sse2 pxor 16 No complain sse2 pxor 18 Complain sse2 xorpd 20 No complain sse2 xorpd`
/external/flac/libFLAC/
D	cpu.c	170 info->data.ia32.sse2 = false; in FLAC__cpu_info() 184 info->data.ia32.sse2 = (flags_edx & FLAC__CPUINFO_IA32_CPUID_SSE2 )? true : false; in FLAC__cpu_info() 205 fprintf(stderr, " SSE2 ....... %c\n", info->data.ia32.sse2 ? 'Y' : 'n'); in FLAC__cpu_info() 216 if(info->data.ia32.fxsr \|\| info->data.ia32.sse \|\| info->data.ia32.sse2) { in FLAC__cpu_info() 219 …info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->d… in FLAC__cpu_info() 229 …info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->d… in FLAC__cpu_info() 235 …info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->d… in FLAC__cpu_info() 240 info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = false; in FLAC__cpu_info() 243 …info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->d… in FLAC__cpu_info() 282 …info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->d… in FLAC__cpu_info() [all …]
/external/libvpx/vp8/encoder/x86/
D	variance_mmx.c	97 unsigned int sse0, sse1, sse2, sse3, var; in vp8_get16x16var_mmx() local 103 …c_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ; in vp8_get16x16var_mmx() 106 var = sse0 + sse1 + sse2 + sse3; in vp8_get16x16var_mmx() 159 unsigned int sse0, sse1, sse2, sse3, var; in vp8_mse16x16_mmx() local 165 …c_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ; in vp8_mse16x16_mmx() 168 var = sse0 + sse1 + sse2 + sse3; in vp8_mse16x16_mmx() 181 unsigned int sse0, sse1, sse2, sse3, var; in vp8_variance16x16_mmx() local 187 …c_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ; in vp8_variance16x16_mmx() 190 var = sse0 + sse1 + sse2 + sse3; in vp8_variance16x16_mmx()
/external/llvm/test/Transforms/ConstProp/
D	calls.ll	40 %i4 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 1.75, double undef>) nounwind 41 %i5 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> <double 1.75, double undef>) nounwind 42 %i6 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 1.75, double undef>) nounwind 43 %i7 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> <double 1.75, double undef>) nounwind 59 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone 60 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone 61 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone 62 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone

12 3 4 5 6 7 8 9

abi
bionic
bootable
build
cts
dalvik
development
device
docs
external
frameworks
gdk
hardware
libcore
libnativehelper
ndk
packages
pdk
sdk
system