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Searched refs:tcg_gen_st32_tl (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-i386/
Dtranslate.c289 tcg_gen_st32_tl(t0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET); in gen_op_mov_reg_v()
292 tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET); in gen_op_mov_reg_v()
301 tcg_gen_st32_tl(t0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET); in gen_op_mov_reg_v()
325 tcg_gen_st32_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET); in gen_op_mov_reg_A0()
328 tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET); in gen_op_mov_reg_A0()
337 tcg_gen_st32_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET); in gen_op_mov_reg_A0()
2379 tcg_gen_st32_tl(cpu_T[0], cpu_env, in gen_op_movl_seg_T0_vm()
3233 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0))); in gen_sse()
3235 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(1))); in gen_sse()
3236 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(2))); in gen_sse()
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/external/qemu/tcg/
Dtcg-op.h2392 #define tcg_gen_st32_tl tcg_gen_st32_i64 macro
2464 #define tcg_gen_st32_tl tcg_gen_st_i32 macro