/external/llvm/include/llvm/Support/ |
D | Endian.h | 25 enum alignment {unaligned, aligned}; enumerator 42 struct alignment_access_helper<value_type, unaligned> 96 class packed_endian_specific_integral<value_type, little, unaligned> { 99 return endian::read_le<value_type, unaligned>(Value); 102 endian::write_le<value_type, unaligned>((void *)&Value, newValue); 109 class packed_endian_specific_integral<value_type, big, unaligned> { 112 return endian::read_be<value_type, unaligned>(Value); 115 endian::write_be<value_type, unaligned>((void *)&Value, newValue); 150 <uint8_t, little, unaligned> ulittle8_t; 152 <uint16_t, little, unaligned> ulittle16_t; [all …]
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/external/llvm/unittests/Support/ |
D | EndianTest.cpp | 27 EXPECT_EQ(BigAsHost, (endian::read_be<int32_t, unaligned>(big))); in TEST() 29 EXPECT_EQ(LittleAsHost, (endian::read_le<int32_t, unaligned>(little))); in TEST() 31 EXPECT_EQ((endian::read_be<int32_t, unaligned>(big + 1)), in TEST() 32 (endian::read_le<int32_t, unaligned>(little + 1))); in TEST() 37 endian::write_be<int32_t, unaligned>(data, -1362446643); in TEST() 42 endian::write_be<int32_t, unaligned>(data + 1, -1362446643); in TEST() 48 endian::write_le<int32_t, unaligned>(data, -1362446643); in TEST() 53 endian::write_le<int32_t, unaligned>(data + 1, -1362446643); in TEST()
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/external/elfutils/libcpu/ |
D | memory-access.h | 81 union unaligned union 95 const union unaligned *up = p; in read_2ubyte_unaligned() 103 const union unaligned *up = p; in read_2sbyte_unaligned() 112 const union unaligned *up = p; in read_4ubyte_unaligned_noncvt() 118 const union unaligned *up = p; in read_4ubyte_unaligned() 126 const union unaligned *up = p; in read_4sbyte_unaligned() 135 const union unaligned *up = p; in read_8ubyte_unaligned() 143 const union unaligned *up = p; in read_8sbyte_unaligned()
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/external/elfutils/libdw/ |
D | memory-access.h | 178 union unaligned union 192 const union unaligned *up = p; in read_2ubyte_unaligned() 200 const union unaligned *up = p; in read_2sbyte_unaligned() 209 const union unaligned *up = p; in read_4ubyte_unaligned_noncvt() 215 const union unaligned *up = p; in read_4ubyte_unaligned() 223 const union unaligned *up = p; in read_4sbyte_unaligned() 232 const union unaligned *up = p; in read_8ubyte_unaligned() 240 const union unaligned *up = p; in read_8sbyte_unaligned()
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/external/eigen/test/eigen2/ |
D | eigen2_unalignedassert.cpp | 85 float *unaligned = buf; in check_unalignedassert_bad() local 86 …while((reinterpret_cast<std::size_t>(unaligned)&0xf)==0) ++unaligned; // make sure unaligned is re… in check_unalignedassert_bad() 87 T *x = ::new(static_cast<void*>(unaligned)) T; in check_unalignedassert_bad()
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/external/llvm/test/CodeGen/Mips/ |
D | swzero.ll | 3 %struct.unaligned = type <{ i32 }> 5 define void @zero_u(%struct.unaligned* nocapture %p) nounwind { 9 %x = getelementptr inbounds %struct.unaligned* %p, i32 0, i32 0
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/external/elfutils/libelf/ |
D | gelf_xlate.c | 92 union unaligned union 99 #define FETCH(Bits, ptr) (((const union unaligned *) ptr)->u##Bits) 100 #define STORE(Bits, ptr, val) (((union unaligned *) ptr)->u##Bits = val)
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/external/valgrind/main/none/tests/ |
D | map_unaligned.stderr.exp | 2 unaligned mmap failed: Invalid argument
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/external/oprofile/events/alpha/ev67/ |
D | events | 18 event:0x0c counters:0 um:zero minimum:500 name:UNALIGNED_0 : PCTR0 triggered; unaligned load/store … 27 event:0x15 counters:0 um:zero minimum:500 name:UNALIGNED_1 : PCTR1 triggered; unaligned load/store …
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/external/openssl/crypto/sha/asm/ |
D | sha512-armv4.s | 452 vld1.64 {d0},[r1]! @ handles unaligned 489 vld1.64 {d1},[r1]! @ handles unaligned 526 vld1.64 {d2},[r1]! @ handles unaligned 563 vld1.64 {d3},[r1]! @ handles unaligned 600 vld1.64 {d4},[r1]! @ handles unaligned 637 vld1.64 {d5},[r1]! @ handles unaligned 674 vld1.64 {d6},[r1]! @ handles unaligned 711 vld1.64 {d7},[r1]! @ handles unaligned 748 vld1.64 {d8},[r1]! @ handles unaligned 785 vld1.64 {d9},[r1]! @ handles unaligned [all …]
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D | sha1-armv4-large.s | 33 ldr r9,[r1],#4 @ handles unaligned 58 ldr r9,[r1],#4 @ handles unaligned 83 ldr r9,[r1],#4 @ handles unaligned 108 ldr r9,[r1],#4 @ handles unaligned 133 ldr r9,[r1],#4 @ handles unaligned 161 ldr r9,[r1],#4 @ handles unaligned
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/external/llvm/test/CodeGen/X86/ |
D | 2010-01-07-UAMemFeature.ll | 1 ; RUN: llc -mcpu=yonah -mattr=vector-unaligned-mem -march=x86 < %s | FileCheck %s
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/external/llvm/lib/Target/X86/ |
D | X86.td | 76 def FeatureFastUAMem : SubtargetFeature<"fast-unaligned-mem", 78 "Fast unaligned memory access">; 101 def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem", 103 "Allow unaligned memory operands on vector/SIMD instructions">;
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/external/oprofile/events/alpha/ev6/ |
D | events | 10 event:0x07 counters:1 um:zero minimum:500 name:UNALIGNED_TRAP : Retired unaligned traps
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/external/clang/test/CodeGenObjC/ |
D | property-aggregate.m | 4 // not get native atomics, even though x86-64 can do unaligned atomics
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/external/eigen/doc/ |
D | D03_WrongStackAlignment.dox | 22 …' being created at an unaligned location, making your program crash with the \ref TopicUnalignedAr…
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/external/libpcap/ |
D | aclocal.m4 | 583 dnl Checks to see if unaligned memory accesses fail 594 [AC_MSG_CHECKING(if unaligned accesses fail) 601 # the CPU faults on an unaligned access, but at least some 603 # the unaligned access (e.g., Alpha/{Digital,Tru64} UNIX) - 610 # comment) doesn't fault on unaligned accesses, but doesn't 611 # do a normal unaligned fetch, either (e.g., presumably, ARM); 620 # file and conclude that unaligned accesses don't work). 679 AC_DEFINE(LBL_ALIGN,1,[if unaligned access fails])
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/external/llvm/test/Transforms/InstCombine/ |
D | align-addr.ll | 35 ; When we see a unaligned load from an insufficiently aligned global or
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/external/llvm/test/CodeGen/ARM/ |
D | fast-isel.ll | 160 ; Check unaligned stores 199 ; Check unaligned loads of floats
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/external/valgrind/main/memcheck/tests/ |
D | origin3-no.stderr.exp | 30 Undef 4 of 8 (32 bit undef, unaligned)
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/external/compiler-rt/lib/tsan/rtl/ |
D | tsan_rtl_thread.cc | 349 bool unaligned = (addr % kShadowCell) != 0; in MemoryAccessRange() local 360 if (unaligned) in MemoryAccessRange()
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/external/oprofile/events/ppc64/970MP/ |
D | events | 53 …ers:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP4 : (Group 4 pm_lsu) LRQ unaligned load flushes 54 …rs:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP4 : (Group 4 pm_lsu) SRQ unaligned store flushes 173 …ero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU0 unaligned load flushes 174 …ero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU1 unaligned load flushes 183 …o minimum:1000 name:PM_LSU0_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU0 unaligned store flushes 184 …o minimum:1000 name:PM_LSU1_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU1 unaligned store flushes 385 …1000 name:PM_MRK_LSU0_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned store flushes 386 …1000 name:PM_MRK_LSU1_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned store flushes 389 …:1000 name:PM_MRK_LSU0_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned load flushes 390 …:1000 name:PM_MRK_LSU1_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned load flushes
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/external/oprofile/events/ppc64/970/ |
D | events | 48 …ers:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP4 : (Group 4 pm_lsu) LRQ unaligned load flushes 49 …rs:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP4 : (Group 4 pm_lsu) SRQ unaligned store flushes 168 …ero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU0 unaligned load flushes 169 …ero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP16 : (Group 16 pm_lsu_load1) LSU1 unaligned load flushes 178 …o minimum:1000 name:PM_LSU0_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU0 unaligned store flushes 179 …o minimum:1000 name:PM_LSU1_FLUSH_UST_GRP17 : (Group 17 pm_lsu_store1) LSU1 unaligned store flushes 380 …1000 name:PM_MRK_LSU0_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned store flushes 381 …1000 name:PM_MRK_LSU1_FLUSH_UST_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned store flushes 384 …:1000 name:PM_MRK_LSU0_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU0 marked unaligned load flushes 385 …:1000 name:PM_MRK_LSU1_FLUSH_ULD_GRP37 : (Group 37 pm_lsu_mark1) LSU1 marked unaligned load flushes
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/external/oprofile/events/ppc64/power5++/ |
D | events | 147 …um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP21 : (Group 21 pm_flush1) SRQ unaligned store flushes 175 #Group 26 pm_lsu_flush_unaligned, LSU flush due to unaligned data 176 …mum:1000 name:PM_LSU_FLUSH_ULD_GRP26 : (Group 26 pm_lsu_flush_unaligned) LRQ unaligned load flushes 177 …um:1000 name:PM_LSU_FLUSH_UST_GRP26 : (Group 26 pm_lsu_flush_unaligned) SRQ unaligned store flushes 181 #Group 27 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load 182 …minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP27 : (Group 27 pm_lsu_flush_uld) LSU0 unaligned load flushes 183 …minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP27 : (Group 27 pm_lsu_flush_uld) LSU1 unaligned load flushes 187 #Group 28 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store 188 …inimum:1000 name:PM_LSU0_FLUSH_UST_GRP28 : (Group 28 pm_lsu_flush_ust) LSU0 unaligned store flushes 189 …inimum:1000 name:PM_LSU1_FLUSH_UST_GRP28 : (Group 28 pm_lsu_flush_ust) LSU1 unaligned store flushes [all …]
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/external/v8/build/ |
D | common.gypi | 39 # generated by V8 to do unaligned memory access, and setting it to 'false' 42 # setting. Note that for Intel architectures (ia32 and x64) unaligned memory
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