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1 /*
2  * public_descriptors.h
3  *
4  * Copyright(c) 1998 - 2009 Texas Instruments. All rights reserved.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  *
11  *  * Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  *  * Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in
15  *    the documentation and/or other materials provided with the
16  *    distribution.
17  *  * Neither the name Texas Instruments nor the names of its
18  *    contributors may be used to endorse or promote products derived
19  *    from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /**********************************************************************************************************************
35 
36   FILENAME:       public_descriptors.h
37 
38   DESCRIPTION:    Contains the host interface descriptor types in use.
39 
40 
41 
42 ***********************************************************************************************************************/
43 #ifndef PUBLIC_DESCRIPTORS_H
44 #define PUBLIC_DESCRIPTORS_H
45 
46 
47 #include "public_types.h"
48 
49 
50 
51 /******************************************************************************
52 
53 		TX PATH
54 
55 ******************************************************************************/
56 
57 #define AID_BROADCAST 0x0       /* broadcast frames AID */
58 #define AID_GLOBAL    0xFF      /* unassociated STAs AID */
59 
60 #define TRQ_DEPTH           16      /* depth of TX Result Queue */
61 
62 #define NUM_TX_DESCRIPTORS  32      /* Total number of Tx descriptors in the FW */
63 
64 /* TX attributes masks and offset used in the txAttr of TxIfDescriptor_t. */
65 #define     TX_ATTR_SAVE_RETRIES          BIT_0
66 #define     TX_ATTR_HEADER_PAD            BIT_1
67 #define     TX_ATTR_SESSION_COUNTER       (BIT_2 | BIT_3 | BIT_4)
68 #define     TX_ATTR_RATE_POLICY           (BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)
69 #define     TX_ATTR_LAST_WORD_PAD         (BIT_10 | BIT_11)
70 #define     TX_ATTR_TX_CMPLT_REQ          BIT_12
71 
72 #define     TX_ATTR_OFST_SAVE_RETRIES     0
73 #define     TX_ATTR_OFST_HEADER_PAD       1
74 #define     TX_ATTR_OFST_SESSION_COUNTER  2
75 #define     TX_ATTR_OFST_RATE_POLICY      5
76 #define     TX_ATTR_OFST_LAST_WORD_PAD    10
77 #define     TX_ATTR_OFST_TX_CMPLT_REQ     12
78 
79 /* The packet transmission result, written in the status field of TxResultDescriptor_t */
80 typedef enum
81 {
82     TX_SUCCESS              = 0,
83 	TX_HW_ERROR             = 1,
84 	TX_DISABLED             = 2,
85 	TX_RETRY_EXCEEDED       = 3,
86 	TX_TIMEOUT              = 4,
87 	TX_KEY_NOT_FOUND        = 5,
88 	TX_PEER_NOT_FOUND       = 6,
89     TX_SESSION_MISMATCH     = 7
90 } TxDescStatus_enum;
91 
92 #ifdef HOST_COMPILE
93 typedef uint8 TxDescStatus_e;
94 #else
95 typedef TxDescStatus_enum TxDescStatus_e;
96 #endif
97 
98 /* The Tx Descriptor preceding each Tx packet copied to the FW (before the packet). */
99 typedef struct TxIfDescriptor_t
100 {
101     uint16          length;		/* Length of packet in words, including descriptor+header+data */
102     uint8           extraMemBlks; /* Number of extra memory blocks to allocate for this packet in addition
103                                        to the number of blocks derived from the packet length */
104     uint8           totalMemBlks;   /* Total number of memory blocks allocated by the host for this packet.
105                                     Must be equal or greater than the actual blocks number allocated by HW!! */
106     uint32          startTime;  /* Device time (in us) when the packet arrived to the driver */
107     uint16          lifeTime;   /* Max delay in TUs until transmission. The last device time the
108                                       packet can be transmitted is: startTime+(1024*LifeTime) */
109     uint16          txAttr;		/* Bitwise fields - see TX_ATTR... definitions above. */
110     uint8           descID;		/* Packet identifier used also in the Tx-Result. */
111     uint8           tid;		/* The packet TID value (as User-Priority) */
112     uint8           aid;	    /* Identifier of the remote STA in IBSS, 1 in infra-BSS */
113     uint8           reserved;       /* For HW use, set to 0 */
114 
115 } TxIfDescriptor_t;
116 
117 
118 /* The Tx result retrieved from FW upon TX completion. */
119 typedef struct TxResultDescriptor_t
120 {
121     uint8			descID;		 /* Packet Identifier - same value used in the Tx descriptor.*/
122 	TxDescStatus_e	status;		 /* The status of the transmission, indicating success or one of several
123 									 possible reasons for failure. Refer to TxDescStatus_enum above.*/
124     uint16 			mediumUsage; /* Total air access duration including all retrys and overheads.*/
125     uint32 			fwHandlingTime;	/* The time passed from host xfer to Tx-complete.*/
126     uint32 			mediumDelay; /* Total media delay (from 1st EDCA AIFS counter until TX Complete). */
127     uint8  			lsbSecuritySequenceNumber; /* LS-byte of last TKIP seq-num (saved per AC for recovery).*/
128     uint8  			ackFailures; /* Retry count - number of transmissions without successful ACK.*/
129     TxRateIndex_t	rate;		 /* The rate that succeeded getting ACK (Valid only if status=SUCCESS). */
130     uint8  			spare;       /* for 4-byte alignment. */
131 } TxResultDescriptor_t;
132 
133 /* The Host-FW Tx-Result control counters */
134 typedef struct
135 {
136 	uint32 TxResultFwCounter;	/* FW updates num of results written to results-queue since FW-init. */
137     uint32 TxResultHostCounter;	/* Host updates num of results read from results-queue since FW-init. */
138 } TxResultControl_t;
139 
140 /* The Host-FW Tx-Result Interface */
141 typedef struct
142 {
143 	TxResultControl_t TxResultControl;  		   /* See above. */
144 	TxResultDescriptor_t TxResultQueue[TRQ_DEPTH];
145 } TxResultInterface_t;
146 
147 
148 /******************************************************************************
149 
150 		RX PATH
151 
152 ******************************************************************************/
153 /* ------------------------------------- */
154 /* flags field in the RxIfDescriptor_t   */
155 /* ------------------------------------- */
156 /*   Bit5-7: Encryption type:            */
157 /*           0 - none                    */
158 /*           1 - WEP                     */
159 /*           2 - TKIP                    */
160 /*           3 - AES                     */
161 /*           4 - GEM                     */
162 /*   Bit4: HT                            */
163 /*   Bit3: Was part of A-MPDU            */
164 /*   Bit2: STBC                          */
165 /*   Bit0-1: Band the frame was received */
166 /*           from (0=2.4, 1=4.9, 2=5.0)  */
167 /* ------------------------------------- */
168 #define    RX_DESC_BAND_MASK        0x03  /* Band is in Bits 0-1 */
169 #define    RX_DESC_BAND_BG          0x00
170 #define    RX_DESC_BAND_J           0x01
171 #define    RX_DESC_BAND_A           0x02
172 #define    RX_DESC_STBC             0x04
173 #define    RX_DESC_A_MPDU           0x08
174 #define    RX_DESC_HT               0x10
175 #define    RX_DESC_ENCRYPT_MASK     0xE0  /* Encryption is in Bits 5-7 */
176 #define    RX_DESC_ENCRYPT_WEP      0x20
177 #define    RX_DESC_ENCRYPT_TKIP     0x40
178 #define    RX_DESC_ENCRYPT_AES      0x60
179 #define    RX_DESC_ENCRYPT_GEM      0x80
180 
181 
182 /* ------------------------------------- */
183 /* Status field in the RxIfDescriptor_t  */
184 /* ------------------------------------- */
185 /*   Bit3-7: reserved (0)                */
186 /*   Bit0-2: 0 - Success,                */
187 /*           1 - RX_DECRYPT_FAIL,        */
188 /*           2 - RX_MIC_FAIL             */
189 /* ------------------------------------- */
190 #define    RX_DESC_STATUS_SUCCESS           0
191 #define    RX_DESC_STATUS_DECRYPT_FAIL      1
192 #define    RX_DESC_STATUS_MIC_FAIL          2
193 #define    RX_DESC_STATUS_DRIVER_RX_Q_FAIL  3
194 
195 #define    RX_DESC_STATUS_MASK              7
196 
197 
198 /**********************************************
199     clasify tagging
200 ***********************************************/
201 typedef enum
202 {
203     TAG_CLASS_UNKNOWN       = 0,
204     TAG_CLASS_MANAGEMENT    = 1, /* other than Beacon or Probe Resp */
205     TAG_CLASS_DATA          = 2,
206     TAG_CLASS_QOS_DATA      = 3,
207     TAG_CLASS_BCN_PRBRSP    = 4,
208     TAG_CLASS_EAPOL         = 5,
209     TAG_CLASS_BA_EVENT      = 6,
210     TAG_CLASS_AMSDU         = 7
211 } PacketClassTag_enum;
212 
213 #ifdef HOST_COMPILE
214 typedef uint8 PacketClassTag_e;
215 #else
216 typedef PacketClassTag_enum PacketClassTag_e;
217 #endif
218 
219 typedef uint8 ProcessIDTag_e;
220 
221 
222 /* ------------------------------------------------------- */
223 /* flags field in the driverFlags of the RxIfDescriptor_t  */
224 /* ------------------------------------------------------- */
225 /*   Bit0   :  EndOfBurst flag                              */
226 /*   Bit1-7 : - not in use                                 */
227 /* ------------------------------------------------------- */
228 
229 #define DRV_RX_FLAG_END_OF_BURST  0x01
230 
231 
232 
233 /******************************************************************************
234 
235     RxIfDescriptor_t
236 
237     the structure of the Rx Descriptor recieved by HOST.
238 
239 ******************************************************************************/
240 typedef struct
241 {
242 	uint16              length;             /* Length of payload (including headers)*/
243 
244     uint8               status;             /* 0 = Success, 1 = RX Decrypt Fail, 2 = RX MIC Fail */
245 
246     uint8               flags;              /* See RX_DESC_xxx above */
247 
248     TxRateIndex_t       rate;               /* Recevied Rate:at ETxRateClassId format */
249 
250     uint8               channel;            /* The received channel*/
251 
252     int8                rx_level;           /* The computed RSSI value in db of current frame */
253 
254     uint8               rx_snr;             /* The computed SNR value in db of current frame */
255 
256     uint32              timestamp;          /* Timestamp in microseconds,     */
257 
258     PacketClassTag_e    packet_class_tag;   /* Packet classification tagging info */
259 
260     ProcessIDTag_e      proccess_id_tag;    /* Driver defined ID */
261 
262     uint8               extraBytes;         /* Number of padding bytes added to actual packet length */
263 
264     uint8               driverFlags;        /* holds the driver flags to be used internally */
265 
266 } RxIfDescriptor_t;
267 
268 
269 
270 #endif /* PUBLIC_DESCRIPTORS_H*/
271 
272 
273 
274