/external/llvm/include/llvm/Support/ |
D | DebugLoc.h | 32 DebugLoc DL; 33 DL.LineCol = 1; 34 return DL; 40 DebugLoc DL; 41 DL.LineCol = 2; 42 return DL; 95 bool operator==(const DebugLoc &DL) const { 96 return LineCol == DL.LineCol && ScopeIdx == DL.ScopeIdx; 98 bool operator!=(const DebugLoc &DL) const { return !(*this == DL); }
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstrBuilder.h | 196 DebugLoc DL, in BuildMI() argument 198 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)); in BuildMI() 205 DebugLoc DL, in BuildMI() argument 208 return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL)) in BuildMI() 218 DebugLoc DL, in BuildMI() argument 221 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); in BuildMI() 228 DebugLoc DL, in BuildMI() argument 231 MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL); in BuildMI() 238 DebugLoc DL, in BuildMI() argument 243 return BuildMI(BB, MII, DL, MCID, DestReg); in BuildMI() [all …]
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D | SelectionDAG.h | 392 SDValue getGlobalAddress(const GlobalValue *GV, DebugLoc DL, EVT VT, 395 SDValue getTargetGlobalAddress(const GlobalValue *GV, DebugLoc DL, EVT VT, 398 return getGlobalAddress(GV, DL, VT, offset, true, TargetFlags); 498 SDValue getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT); 502 SDValue getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT); 506 SDValue getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT); 510 SDValue getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT SrcTy); 513 SDValue getNOT(DebugLoc DL, SDValue Val, EVT VT); 552 SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT); 553 SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N); [all …]
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D | LexicalScopes.h | 71 void getMachineBasicBlocks(DebugLoc DL, 76 bool dominates(DebugLoc DL, MachineBasicBlock *MBB); 80 LexicalScope *findLexicalScope(DebugLoc DL); 94 LexicalScope *findInlinedScope(DebugLoc DL) { in findInlinedScope() argument 95 return InlinedLexicalScopeMap.lookup(DL); in findInlinedScope() 110 LexicalScope *getOrCreateLexicalScope(DebugLoc DL);
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/external/llvm/lib/Target/MSP430/ |
D | MSP430FrameLowering.cpp | 49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); in emitPrologue() local 66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) in emitPrologue() 70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW) in emitPrologue() 86 DL = MBBI->getDebugLoc(); in emitPrologue() 98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW) in emitPrologue() 115 DebugLoc DL = MBBI->getDebugLoc(); in emitEpilogue() local 135 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW); in emitEpilogue() 148 DL = MBBI->getDebugLoc(); in emitEpilogue() 156 BuildMI(MBB, MBBI, DL, in emitEpilogue() 160 BuildMI(MBB, MBBI, DL, in emitEpilogue() [all …]
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D | MSP430InstrInfo.cpp | 39 DebugLoc DL; in storeRegToStackSlot() local 40 if (MI != MBB.end()) DL = MI->getDebugLoc(); in storeRegToStackSlot() 51 BuildMI(MBB, MI, DL, get(MSP430::MOV16mr)) in storeRegToStackSlot() 55 BuildMI(MBB, MI, DL, get(MSP430::MOV8mr)) in storeRegToStackSlot() 67 DebugLoc DL; in loadRegFromStackSlot() local 68 if (MI != MBB.end()) DL = MI->getDebugLoc(); in loadRegFromStackSlot() 79 BuildMI(MBB, MI, DL, get(MSP430::MOV16rm)) in loadRegFromStackSlot() 82 BuildMI(MBB, MI, DL, get(MSP430::MOV8rm)) in loadRegFromStackSlot() 89 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 100 BuildMI(MBB, I, DL, get(Opc), DestReg) in copyPhysReg() [all …]
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/external/llvm/lib/Target/Mips/ |
D | MipsLongBranch.cpp | 83 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL, 219 DebugLoc DL, MachineBasicBlock *MBBOpnd) { in replaceBranch() argument 223 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); in replaceBranch() 245 DebugLoc DL = I.Br->getDebugLoc(); in expandToLongBranch() local 282 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch() 284 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA) in expandToLongBranch() 286 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB); in expandToLongBranch() 287 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi) in expandToLongBranch() 292 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::AT) in expandToLongBranch() 294 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch() [all …]
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D | MipsInstrInfo.cpp | 50 DebugLoc DL; in insertNoop() local 51 BuildMI(MBB, MI, DL, get(Mips::NOP)); in insertNoop() 67 DebugLoc DL) const { in emitFrameIndexDebugValue() 68 MachineInstrBuilder MIB = BuildMI(MF, DL, get(Mips::DBG_VALUE)) in emitFrameIndexDebugValue() 173 MachineBasicBlock *TBB, DebugLoc DL, in BuildCondBr() argument 178 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID); in BuildCondBr() 190 DebugLoc DL) const { in InsertBranch() 204 BuildCondBr(MBB, TBB, DL, Cond); in InsertBranch() 205 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(FBB); in InsertBranch() 212 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(TBB); in InsertBranch() [all …]
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D | MipsSEInstrInfo.cpp | 86 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 142 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); in copyPhysReg() 159 DebugLoc DL; in storeRegToStackSlot() local 160 if (I != MBB.end()) DL = I->getDebugLoc(); in storeRegToStackSlot() 177 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot() 187 DebugLoc DL; in loadRegFromStackSlot() local 188 if (I != MBB.end()) DL = I->getDebugLoc(); in loadRegFromStackSlot() 204 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0) in loadRegFromStackSlot() 256 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); in adjustStackPtr() local 261 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); in adjustStackPtr() [all …]
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D | MipsISelDAGToDAG.cpp | 127 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); in InitGlobalBaseReg() local 150 BuildMI(MBB, I, DL, TII.get(Mips::LUi64), V0) in InitGlobalBaseReg() 152 BuildMI(MBB, I, DL, TII.get(Mips::DADDu), V1).addReg(V0) in InitGlobalBaseReg() 154 BuildMI(MBB, I, DL, TII.get(Mips::DADDiu), GlobalBaseReg).addReg(V1) in InitGlobalBaseReg() 160 BuildMI(MBB, I, DL, TII.get(Mips::LiRxImmX16), V0) in InitGlobalBaseReg() 162 BuildMI(MBB, I, DL, TII.get(Mips::AddiuRxPcImmX16), V1) in InitGlobalBaseReg() 164 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16); in InitGlobalBaseReg() 165 BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg) in InitGlobalBaseReg() 175 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0) in InitGlobalBaseReg() 177 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0) in InitGlobalBaseReg() [all …]
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXInstrInfo.cpp | 37 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 42 BuildMI(MBB, I, DL, get(NVPTX::IMOV32rr), DestReg) in copyPhysReg() 46 BuildMI(MBB, I, DL, get(NVPTX::IMOV8rr), DestReg) in copyPhysReg() 50 BuildMI(MBB, I, DL, get(NVPTX::IMOV1rr), DestReg) in copyPhysReg() 54 BuildMI(MBB, I, DL, get(NVPTX::FMOV32rr), DestReg) in copyPhysReg() 58 BuildMI(MBB, I, DL, get(NVPTX::IMOV16rr), DestReg) in copyPhysReg() 62 BuildMI(MBB, I, DL, get(NVPTX::IMOV64rr), DestReg) in copyPhysReg() 66 BuildMI(MBB, I, DL, get(NVPTX::FMOV64rr), DestReg) in copyPhysReg() 70 BuildMI(MBB, I, DL, get(NVPTX::V4f32Mov), DestReg) in copyPhysReg() 74 BuildMI(MBB, I, DL, get(NVPTX::V4i32Mov), DestReg) in copyPhysReg() [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 205 DebugLoc DL; in insertNoop() local 206 BuildMI(MBB, MI, DL, get(PPC::NOP)); in insertNoop() 379 DebugLoc DL) const { in InsertBranch() 390 BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB); in InsertBranch() 392 BuildMI(&MBB, DL, get(Cond[0].getImm() ? in InsertBranch() 396 BuildMI(&MBB, DL, get(PPC::BCC)) in InsertBranch() 403 BuildMI(&MBB, DL, get(Cond[0].getImm() ? in InsertBranch() 407 BuildMI(&MBB, DL, get(PPC::BCC)) in InsertBranch() 409 BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB); in InsertBranch() 414 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument [all …]
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/external/llvm/lib/Target/XCore/ |
D | XCoreInstrInfo.cpp | 278 DebugLoc DL)const{ in InsertBranch() 287 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB); in InsertBranch() 291 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) in InsertBranch() 300 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) in InsertBranch() 302 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB); in InsertBranch() 335 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 342 BuildMI(MBB, I, DL, get(XCore::ADD_2rus), DestReg) in copyPhysReg() 349 BuildMI(MBB, I, DL, get(XCore::LDAWSP_ru6), DestReg).addImm(0); in copyPhysReg() 354 BuildMI(MBB, I, DL, get(XCore::SETSP_1r)) in copyPhysReg() 368 DebugLoc DL; in storeRegToStackSlot() local [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.cpp | 233 DebugLoc DL) const { in InsertBranch() 240 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB); in InsertBranch() 248 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); in InsertBranch() 250 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); in InsertBranch() 254 BuildMI(&MBB, DL, get(SP::BA)).addMBB(FBB); in InsertBranch() 281 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 285 BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) in copyPhysReg() 288 BuildMI(MBB, I, DL, get(SP::FMOVS), DestReg) in copyPhysReg() 291 BuildMI(MBB, I, DL, get(Subtarget.isV9() ? SP::FMOVD : SP::FpMOVD), DestReg) in copyPhysReg() 302 DebugLoc DL; in storeRegToStackSlot() local [all …]
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/external/llvm/lib/Target/ARM/ |
D | Thumb1InstrInfo.cpp | 42 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 45 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg) in copyPhysReg() 63 DebugLoc DL; in storeRegToStackSlot() local 64 if (I != MBB.end()) DL = I->getDebugLoc(); in storeRegToStackSlot() 73 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi)) in storeRegToStackSlot() 91 DebugLoc DL; in loadRegFromStackSlot() local 92 if (I != MBB.end()) DL = I->getDebugLoc(); in loadRegFromStackSlot() 101 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg) in loadRegFromStackSlot()
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D | ARMFastISel.cpp | 295 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg)); in FastEmitInst_() 306 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_r() 309 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_r() 311 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_r() 326 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_rr() 330 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_rr() 333 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_rr() 349 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_rrr() 354 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_rrr() 358 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_rrr() [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 215 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in materializeRegForValue() 321 DebugLoc OldDL = DL; in enterLocalValueArea() 323 DL = DebugLoc(); in enterLocalValueArea() 334 DL = OldInsertPt.DL; in leaveLocalValueArea() 558 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in SelectCall() 623 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in SelectCall() 641 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 646 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 650 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() 654 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall() [all …]
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D | LegalizeVectorOps.cpp | 447 DebugLoc DL = Op.getDebugLoc(); in ExpandSELECT() local 478 Mask = DAG.getNode(ISD::SELECT, DL, BitTy, Mask, in ExpandSELECT() 484 Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskTy, &Ops[0], Ops.size()); in ExpandSELECT() 489 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1); in ExpandSELECT() 490 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2); in ExpandSELECT() 494 SDValue NotMask = DAG.getNode(ISD::XOR, DL, MaskTy, Mask, AllOnes); in ExpandSELECT() 496 Op1 = DAG.getNode(ISD::AND, DL, MaskTy, Op1, Mask); in ExpandSELECT() 497 Op2 = DAG.getNode(ISD::AND, DL, MaskTy, Op2, NotMask); in ExpandSELECT() 498 SDValue Val = DAG.getNode(ISD::OR, DL, MaskTy, Op1, Op2); in ExpandSELECT() 499 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val); in ExpandSELECT() [all …]
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D | SDNodeDbgValue.h | 49 DebugLoc DL; variable 55 unsigned O) : mdPtr(mdP), Offset(off), DL(dl), Order(O), in SDDbgValue() 65 mdPtr(mdP), Offset(off), DL(dl), Order(O), Invalid(false) { in SDDbgValue() 72 mdPtr(mdP), Offset(off), DL(dl), Order(O), Invalid(false) { in SDDbgValue() 99 DebugLoc getDebugLoc() { return DL; } in getDebugLoc()
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/external/llvm/lib/Target/CellSPU/ |
D | SPUInstrInfo.cpp | 125 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 134 BuildMI(MBB, I, DL, get(SPU::LRr128), DestReg) in copyPhysReg() 165 DebugLoc DL; in storeRegToStackSlot() local 166 if (MI != MBB.end()) DL = MI->getDebugLoc(); in storeRegToStackSlot() 167 addFrameReference(BuildMI(MBB, MI, DL, get(opc)) in storeRegToStackSlot() 198 DebugLoc DL; in loadRegFromStackSlot() local 199 if (MI != MBB.end()) DL = MI->getDebugLoc(); in loadRegFromStackSlot() 200 addFrameReference(BuildMI(MBB, MI, DL, get(opc), DestReg), FrameIdx); in loadRegFromStackSlot() 350 DebugLoc DL) const { in InsertBranch() 364 MIB = BuildMI(&MBB, DL, get(SPU::HBR_LABEL)).addSym(branchLabel); in InsertBranch() [all …]
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/external/libpng/scripts/ |
D | makefile.aix | 44 DL=$(DESTDIR)$(LIBPATH) 80 -@if [ ! -d $(DL) ]; then $(MKDIR_P) $(DL); fi 90 -@$(RM_F) $(DL)/$(LIBNAME)$(A) 91 -@$(RM_F) $(DL)/libpng$(A) 92 cp $(LIBNAME)$(A) $(DL)/$(LIBNAME)$(A) 93 chmod 644 $(DL)/$(LIBNAME)$(A) 94 (cd $(DL); $(LN_SF) $(LIBNAME)$(A) libpng$(A))
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/external/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 161 DebugLoc DL = MBB.findDebugLoc(MBBI); in emitSPUpdate() local 174 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) in emitSPUpdate() 186 MI = addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), in emitSPUpdate() 189 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in emitSPUpdate() 654 DebugLoc DL; in emitPrologue() local 694 BuildMI(MBB, MBBI, DL, in emitPrologue() 740 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) in emitPrologue() 747 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) in emitPrologue() 768 BuildMI(MBB, MBBI, DL, in emitPrologue() 776 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) in emitPrologue() [all …]
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D | X86FastISel.cpp | 228 DL, TII.get(Opc), ResultReg), AM); in X86FastEmitLoad() 246 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in X86FastEmitStore() 278 DL, TII.get(Opc)), AM).addReg(Val); in X86FastEmitStore() 307 DL, TII.get(Opc)), AM) in X86FastEmitStore() 563 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), LoadReg); in X86SelectAddress() 805 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), in X86SelectRet() 813 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::RET)); in X86SelectRet() 891 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CompareImmOpc)) in X86FastEmitCompare() 903 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CompareOpc)) in X86FastEmitCompare() 927 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::SETEr), EReg); in X86SelectCmp() [all …]
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeInstrInfo.cpp | 79 DebugLoc DL; in insertNoop() local 80 BuildMI(MBB, MI, DL, get(MBlaze::NOP)); in insertNoop() 85 MachineBasicBlock::iterator I, DebugLoc DL, in copyPhysReg() argument 88 llvm::BuildMI(MBB, I, DL, get(MBlaze::ADDK), DestReg) in copyPhysReg() 97 DebugLoc DL; in storeRegToStackSlot() local 98 BuildMI(MBB, I, DL, get(MBlaze::SWI)).addReg(SrcReg,getKillRegState(isKill)) in storeRegToStackSlot() 107 DebugLoc DL; in loadRegFromStackSlot() local 108 BuildMI(MBB, I, DL, get(MBlaze::LWI), DestReg) in loadRegFromStackSlot() 190 DebugLoc DL) const { in InsertBranch() 202 BuildMI(&MBB, DL, get(Opc)).addMBB(TBB); in InsertBranch() [all …]
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/external/llvm/tools/llvm-dis/ |
D | llvm-dis.cpp | 56 static void printDebugLoc(const DebugLoc &DL, formatted_raw_ostream &OS) { in printDebugLoc() argument 57 OS << DL.getLine() << ":" << DL.getCol(); in printDebugLoc() 58 if (MDNode *N = DL.getInlinedAt(getGlobalContext())) { in printDebugLoc() 81 const DebugLoc &DL = I->getDebugLoc(); in printInfoComment() local 82 if (!DL.isUnknown()) { in printInfoComment() 89 printDebugLoc(DL,OS); in printInfoComment()
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