Lines Matching refs:SrcReg
354 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); in LowerPHINode() local
357 isImplicitlyDefined(SrcReg, MRI); in LowerPHINode()
358 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && in LowerPHINode()
374 findPHICopyInsertPoint(&opBlock, &MBB, SrcReg); in LowerPHINode()
388 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) in LowerPHINode()
394 .addReg(SrcReg, 0, SrcSubReg); in LowerPHINode()
402 !VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)] && in LowerPHINode()
403 !LV->isLiveOut(SrcReg, opBlock)) { in LowerPHINode()
424 if (Term->readsRegister(SrcReg)) in LowerPHINode()
438 if (KillInst->readsRegister(SrcReg)) in LowerPHINode()
446 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); in LowerPHINode()
449 LV->addVirtualRegisterKilled(SrcReg, KillInst); in LowerPHINode()
453 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum); in LowerPHINode()
463 !VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]) { in LowerPHINode()
464 LiveInterval &SrcLI = LIS->getInterval(SrcReg); in LowerPHINode()
484 if (Term->readsRegister(SrcReg)) in LowerPHINode()
498 if (KillInst->readsRegister(SrcReg)) in LowerPHINode()
506 assert(KillInst->readsRegister(SrcReg) && in LowerPHINode()