Lines Matching refs:Opc
113 bool SelectLdStSOReg(SDValue N, SDValue &Base, SDValue &Offset, SDValue &Opc);
116 SDValue &Offset, SDValue &Opc);
118 SDValue &Opc) { in SelectAddrMode2Base() argument
119 return SelectAddrMode2Worker(N, Base, Offset, Opc) == AM2_BASE; in SelectAddrMode2Base()
123 SDValue &Opc) { in SelectAddrMode2ShOp() argument
124 return SelectAddrMode2Worker(N, Base, Offset, Opc) == AM2_SHOP; in SelectAddrMode2ShOp()
128 SDValue &Opc) { in SelectAddrMode2() argument
129 SelectAddrMode2Worker(N, Base, Offset, Opc); in SelectAddrMode2()
136 SDValue &Offset, SDValue &Opc);
138 SDValue &Offset, SDValue &Opc);
140 SDValue &Offset, SDValue &Opc);
143 SDValue &Offset, SDValue &Opc);
145 SDValue &Offset, SDValue &Opc);
172 SDValue &BaseReg, SDValue &Opc);
238 SDNode *SelectVTBL(SDNode *N, bool IsExt, unsigned NumVecs, unsigned Opc);
265 SDNode *SelectAtomic64(SDNode *Node, unsigned Opc);
308 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) { in isOpcWithIntImmediate() argument
309 return N->getOpcode() == Opc && in isOpcWithIntImmediate()
476 SDValue &Opc, in SelectImmShifterOperand() argument
492 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectImmShifterOperand()
500 SDValue &Opc, in SelectRegShifterOperand() argument
519 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectRegShifterOperand()
576 SDValue &Opc) { in SelectLdStSOReg() argument
592 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
664 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectLdStSOReg()
675 SDValue &Opc) { in SelectAddrMode2Worker() argument
691 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectAddrMode2Worker()
713 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(ARM_AM::add, 0, in SelectAddrMode2Worker()
736 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, RHSC, in SelectAddrMode2Worker()
747 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(ARM_AM::add, 0, in SelectAddrMode2Worker()
803 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectAddrMode2Worker()
809 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetReg() argument
839 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectAddrMode2OffsetReg()
845 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetImmPre() argument
856 Opc = CurDAG->getTargetConstant(Val, MVT::i32); in SelectAddrMode2OffsetImmPre()
865 SDValue &Offset, SDValue &Opc) { in SelectAddrMode2OffsetImm() argument
875 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, Val, in SelectAddrMode2OffsetImm()
891 SDValue &Opc) { in SelectAddrMode3() argument
896 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::sub, 0),MVT::i32); in SelectAddrMode3()
907 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::add, 0),MVT::i32); in SelectAddrMode3()
927 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, RHSC),MVT::i32); in SelectAddrMode3()
933 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::add, 0), MVT::i32); in SelectAddrMode3()
938 SDValue &Offset, SDValue &Opc) { in SelectAddrMode3Offset() argument
948 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, Val), MVT::i32); in SelectAddrMode3Offset()
953 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, 0), MVT::i32); in SelectAddrMode3Offset()
1239 SDValue &Opc) { in SelectT2ShifterOperandReg() argument
1253 Opc = getI32Imm(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal)); in SelectT2ShifterOperandReg()
1643 static unsigned getVLDSTRegisterUpdateOpcode(unsigned Opc) { in getVLDSTRegisterUpdateOpcode() argument
1644 switch (Opc) { in getVLDSTRegisterUpdateOpcode()
1684 return Opc; // If not one we handle, return it unchanged. in getVLDSTRegisterUpdateOpcode()
1745 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLD() local
1754 Opc = getVLDSTRegisterUpdateOpcode(Opc); in SelectVLD()
1757 if ((NumVecs != 1 && NumVecs != 2 && Opc != ARM::VLD1q64wb_fixed) || in SelectVLD()
1764 VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size()); in SelectVLD()
1896 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVST() local
1905 Opc = getVLDSTRegisterUpdateOpcode(Opc); in SelectVST()
1908 if ((NumVecs > 2 && Opc != ARM::VST1q64wb_fixed) || in SelectVST()
1917 CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size()); in SelectVST()
2064 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLDSTLane() local
2066 SDNode *VLdLn = CurDAG->getMachineNode(Opc, dl, ResTys, in SelectVLDSTLane()
2129 unsigned Opc = Opcodes[OpcodeIndex]; in SelectVLDDup() local
2154 CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size()); in SelectVLDDup()
2171 unsigned Opc) { in SelectVTBL() argument
2200 return CurDAG->getMachineNode(Opc, dl, VT, Ops.data(), Ops.size()); in SelectVTBL()
2208 unsigned Opc = isSigned in SelectV6T2BitfieldExtractOp() local
2235 Opc = isSigned ? ARM::t2ASRri : ARM::t2LSRri; in SelectV6T2BitfieldExtractOp()
2239 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2256 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2279 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2293 unsigned Opc = 0; in SelectT2CMOVShiftOp() local
2295 case ARM_AM::lsl: Opc = ARM::t2MOVCClsl; break; in SelectT2CMOVShiftOp()
2296 case ARM_AM::lsr: Opc = ARM::t2MOVCClsr; break; in SelectT2CMOVShiftOp()
2297 case ARM_AM::asr: Opc = ARM::t2MOVCCasr; break; in SelectT2CMOVShiftOp()
2298 case ARM_AM::ror: Opc = ARM::t2MOVCCror; break; in SelectT2CMOVShiftOp()
2306 return CurDAG->SelectNodeTo(N, Opc, MVT::i32,Ops, 6); in SelectT2CMOVShiftOp()
2338 unsigned Opc = 0; in SelectT2CMOVImmOp() local
2341 Opc = ARM::t2MOVCCi; in SelectT2CMOVImmOp()
2343 Opc = ARM::t2MOVCCi16; in SelectT2CMOVImmOp()
2346 Opc = ARM::t2MVNCCi; in SelectT2CMOVImmOp()
2349 Opc = ARM::t2MOVCCi32imm; in SelectT2CMOVImmOp()
2352 if (Opc) { in SelectT2CMOVImmOp()
2356 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectT2CMOVImmOp()
2369 unsigned Opc = 0; in SelectARMCMOVImmOp() local
2373 Opc = ARM::MOVCCi; in SelectARMCMOVImmOp()
2375 Opc = ARM::MOVCCi16; in SelectARMCMOVImmOp()
2378 Opc = ARM::MVNCCi; in SelectARMCMOVImmOp()
2382 Opc = ARM::MOVCCi32imm; in SelectARMCMOVImmOp()
2385 if (Opc) { in SelectARMCMOVImmOp()
2389 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectARMCMOVImmOp()
2465 unsigned Opc = 0; in SelectCMOVOp() local
2469 Opc = Subtarget->isThumb() in SelectCMOVOp()
2474 Opc = ARM::VMOVScc; in SelectCMOVOp()
2477 Opc = ARM::VMOVDcc; in SelectCMOVOp()
2480 return CurDAG->SelectNodeTo(N, Opc, VT, Ops, 5); in SelectCMOVOp()
2531 SDNode *ARMDAGToDAGISel::SelectAtomic64(SDNode *Node, unsigned Opc) { in SelectAtomic64() argument
2536 if (Opc == ARM::ATOMCMPXCHG6432) { in SelectAtomic64()
2543 SDNode *ResNode = CurDAG->getMachineNode(Opc, Node->getDebugLoc(), in SelectAtomic64()
2630 unsigned Opc = ((Subtarget->isThumb() && Subtarget->hasThumb2()) ? in Select() local
2635 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in Select()
2699 unsigned Opc = (Subtarget->isThumb() && Subtarget->hasThumb2()) in Select() local
2702 if (!Opc) in Select()
2722 return CurDAG->getMachineNode(Opc, dl, VT, Ops, 4); in Select()
2820 unsigned Opc = Subtarget->isThumb() ? in Select() local
2835 SDNode *ResNode = CurDAG->getMachineNode(Opc, dl, MVT::Other, in Select()
2849 unsigned Opc = 0; in Select() local
2853 case MVT::v8i8: Opc = ARM::VZIPd8; break; in Select()
2854 case MVT::v4i16: Opc = ARM::VZIPd16; break; in Select()
2857 case MVT::v2i32: Opc = ARM::VTRNd32; break; in Select()
2858 case MVT::v16i8: Opc = ARM::VZIPq8; break; in Select()
2859 case MVT::v8i16: Opc = ARM::VZIPq16; break; in Select()
2861 case MVT::v4i32: Opc = ARM::VZIPq32; break; in Select()
2866 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4); in Select()
2869 unsigned Opc = 0; in Select() local
2873 case MVT::v8i8: Opc = ARM::VUZPd8; break; in Select()
2874 case MVT::v4i16: Opc = ARM::VUZPd16; break; in Select()
2877 case MVT::v2i32: Opc = ARM::VTRNd32; break; in Select()
2878 case MVT::v16i8: Opc = ARM::VUZPq8; break; in Select()
2879 case MVT::v8i16: Opc = ARM::VUZPq16; break; in Select()
2881 case MVT::v4i32: Opc = ARM::VUZPq32; break; in Select()
2886 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4); in Select()
2889 unsigned Opc = 0; in Select() local
2893 case MVT::v8i8: Opc = ARM::VTRNd8; break; in Select()
2894 case MVT::v4i16: Opc = ARM::VTRNd16; break; in Select()
2896 case MVT::v2i32: Opc = ARM::VTRNd32; break; in Select()
2897 case MVT::v16i8: Opc = ARM::VTRNq8; break; in Select()
2898 case MVT::v8i16: Opc = ARM::VTRNq16; break; in Select()
2900 case MVT::v4i32: Opc = ARM::VTRNq32; break; in Select()
2905 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4); in Select()