Lines Matching refs:addend

2690             (ins IntRegs:$base, u6_2Imm:$offset, u5Imm:$addend),
2691             "memw($base+#$offset) += #$addend",
2706             (ins IntRegs:$base, u6_2Imm:$offset, IntRegs:$addend),
2707             "memw($base+#$offset) += $addend",
2709                          (i32 IntRegs:$addend)),
2746             (ins MEMri:$addr, u5Imm:$addend),
2747             "memw($addr) += $addend",
2762             (ins MEMri:$addr, IntRegs:$addend),
2763             "memw($addr) += $addend",
2764             [(store (add (load ADDRriU6_2:$addr), (i32 IntRegs:$addend)),
2823             (ins IntRegs:$base, u6_1Imm:$offset, u5Imm:$addend),
2824             "memh($base+#$offset) += $addend",
2839             (ins IntRegs:$base, u6_1Imm:$offset, IntRegs:$addend),
2840             "memh($base+#$offset) += $addend",
2843                                  (i32 IntRegs:$addend)),
2883             (ins MEMri:$addr, u5Imm:$addend),
2884             "memh($addr) += $addend",
2899             (ins MEMri:$addr, IntRegs:$addend),
2900             "memh($addr) += $addend",
2902                                  (i32 IntRegs:$addend)), ADDRriU6_1:$addr)]>,
2960             (ins IntRegs:$base, u6_0Imm:$offset, u5Imm:$addend),
2961             "memb($base+#$offset) += $addend",
2976             (ins IntRegs:$base, u6_0Imm:$offset, IntRegs:$addend),
2977             "memb($base+#$offset) += $addend",
2980                                 (i32 IntRegs:$addend)),
3020             (ins MEMri:$addr, u5Imm:$addend),
3021             "memb($addr) += $addend",
3036             (ins MEMri:$addr, IntRegs:$addend),
3037             "memb($addr) += $addend",
3039                                 (i32 IntRegs:$addend)), ADDRriU6_0:$addr)]>,