Lines Matching refs:execute

18   // The instruction takes one cycle to execute in each of the stages. The
20   // ready after the execute stage.
24                , InstrStage<1,[EX]>   // one cycle in execute stage
33   // operand.  The instruction takes one cycle to execute in each of the
35   // and the result is ready after the execute stage.
39                , InstrStage<1,[EX]>   // one cycle in execute stage
47   // operands. The instruction takes one cycle to execute in each the pipeline
54                , InstrStage<1,[EX]>   // one cycle in execute stage
63   // The instruction takes one cycle to execute in each of the pipeline stages.
69                , InstrStage<1,[EX]>   // one cycle in execute stage
77   // one cycle to execute in each of the pipeline stages. The source operand is
82                , InstrStage<1,[EX]>   // one cycle in execute stage
88   // instruction takes one cycle to execute in each of the pipeline stages. The
93                , InstrStage<1,[EX]>   // one cycle in execute stage
100   // operand register. The instruction takes one cycle to execute in each of
106                , InstrStage<1,[EX]>   // one cycle in execute stage
113   // instruction takes one cycle to execute in each of the pipeline stages
119                , InstrStage<1,[EX]>   // one cycle in execute stage
126   // operand registers. The instruction takes one cycle to execute in each of
133                , InstrStage<1,[EX]>   // one cycle in execute stage
141   // source operand registers. The instruction takes one cycle to execute in
148                , InstrStage<1,[EX]>   // one cycle in execute stage
157   // to execute in each of the pipeline stages except the memory access stage,
163                , InstrStage<1,[EX]>   // one cycle in execute stage
171   // to execute in each of the pipeline stages except the memory access stage,
177                , InstrStage<1,[EX]>   // one cycle in execute stage
184   // one source operand register. The instruction takes one cycle to execute in
191                , InstrStage<1,[EX]>   // one cycle in execute stage
198   // two source operand registers. The instruction takes one cycle to execute
200   // decode stage and the results are ready after the execute stage.
204                , InstrStage<1,[EX]>   // one cycle in execute stage
212   // destination register. The instruction takes one cycle to execute in each
214   // stage and the result is ready after the execute stage.
218                , InstrStage<1,[EX]>   // one cycle in execute stage
226   // produced by the instruction. The instruction takes one cycle to execute in
232                , InstrStage<1,[EX]>   // one cycle in execute stage
240   // produced by the instruction. The instruction takes one cycle to execute in
246                , InstrStage<1,[EX]>   // one cycle in execute stage
255   // operand. The instruction takes one cycle to execute in each of the
261                , InstrStage<1,[EX]>   // one cycle in execute stage