Lines Matching refs:ISD
100 setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Custom); in InitAMDILLowering()
101 setOperationAction(ISD::SUBE, VT, Expand); in InitAMDILLowering()
102 setOperationAction(ISD::SUBC, VT, Expand); in InitAMDILLowering()
103 setOperationAction(ISD::ADDE, VT, Expand); in InitAMDILLowering()
104 setOperationAction(ISD::ADDC, VT, Expand); in InitAMDILLowering()
105 setOperationAction(ISD::BRCOND, VT, Custom); in InitAMDILLowering()
106 setOperationAction(ISD::BR_JT, VT, Expand); in InitAMDILLowering()
107 setOperationAction(ISD::BRIND, VT, Expand); in InitAMDILLowering()
109 setOperationAction(ISD::SREM, VT, Expand); in InitAMDILLowering()
110 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
111 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
113 setOperationAction(ISD::SDIV, VT, Custom); in InitAMDILLowering()
120 setOperationAction(ISD::FP_ROUND_INREG, VT, Expand); in InitAMDILLowering()
121 setOperationAction(ISD::SETOLT, VT, Expand); in InitAMDILLowering()
122 setOperationAction(ISD::SETOGE, VT, Expand); in InitAMDILLowering()
123 setOperationAction(ISD::SETOGT, VT, Expand); in InitAMDILLowering()
124 setOperationAction(ISD::SETOLE, VT, Expand); in InitAMDILLowering()
125 setOperationAction(ISD::SETULT, VT, Expand); in InitAMDILLowering()
126 setOperationAction(ISD::SETUGE, VT, Expand); in InitAMDILLowering()
127 setOperationAction(ISD::SETUGT, VT, Expand); in InitAMDILLowering()
128 setOperationAction(ISD::SETULE, VT, Expand); in InitAMDILLowering()
135 setOperationAction(ISD::SDIVREM, VT, Expand); in InitAMDILLowering()
138 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
139 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
142 setOperationAction(ISD::ROTR, VT, Expand); in InitAMDILLowering()
143 setOperationAction(ISD::BSWAP, VT, Expand); in InitAMDILLowering()
146 setOperationAction(ISD::CTPOP, VT, Expand); in InitAMDILLowering()
147 setOperationAction(ISD::CTTZ, VT, Expand); in InitAMDILLowering()
148 setOperationAction(ISD::CTLZ, VT, Expand); in InitAMDILLowering()
154 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in InitAMDILLowering()
155 setOperationAction(ISD::SDIVREM, VT, Expand); in InitAMDILLowering()
156 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
158 setOperationAction(ISD::SELECT_CC, VT, Expand); in InitAMDILLowering()
162 setOperationAction(ISD::MULHU, MVT::i64, Expand); in InitAMDILLowering()
163 setOperationAction(ISD::MULHU, MVT::v2i64, Expand); in InitAMDILLowering()
164 setOperationAction(ISD::MULHS, MVT::i64, Expand); in InitAMDILLowering()
165 setOperationAction(ISD::MULHS, MVT::v2i64, Expand); in InitAMDILLowering()
166 setOperationAction(ISD::ADD, MVT::v2i64, Expand); in InitAMDILLowering()
167 setOperationAction(ISD::SREM, MVT::v2i64, Expand); in InitAMDILLowering()
168 setOperationAction(ISD::Constant , MVT::i64 , Legal); in InitAMDILLowering()
169 setOperationAction(ISD::SDIV, MVT::v2i64, Expand); in InitAMDILLowering()
170 setOperationAction(ISD::TRUNCATE, MVT::v2i64, Expand); in InitAMDILLowering()
171 setOperationAction(ISD::SIGN_EXTEND, MVT::v2i64, Expand); in InitAMDILLowering()
172 setOperationAction(ISD::ZERO_EXTEND, MVT::v2i64, Expand); in InitAMDILLowering()
173 setOperationAction(ISD::ANY_EXTEND, MVT::v2i64, Expand); in InitAMDILLowering()
177 setOperationAction(ISD::FADD, MVT::v2f64, Expand); in InitAMDILLowering()
178 setOperationAction(ISD::FSUB, MVT::v2f64, Expand); in InitAMDILLowering()
179 setOperationAction(ISD::FMUL, MVT::v2f64, Expand); in InitAMDILLowering()
180 setOperationAction(ISD::FP_ROUND_INREG, MVT::v2f64, Expand); in InitAMDILLowering()
181 setOperationAction(ISD::FP_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
182 setOperationAction(ISD::ConstantFP , MVT::f64 , Legal); in InitAMDILLowering()
185 setOperationAction(ISD::TRUNCATE, MVT::v2f64, Expand); in InitAMDILLowering()
186 setOperationAction(ISD::SIGN_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
187 setOperationAction(ISD::ZERO_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
188 setOperationAction(ISD::ANY_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
189 setOperationAction(ISD::FABS, MVT::f64, Expand); in InitAMDILLowering()
190 setOperationAction(ISD::FABS, MVT::v2f64, Expand); in InitAMDILLowering()
195 setOperationAction(ISD::UDIV, MVT::v2i8, Expand); in InitAMDILLowering()
196 setOperationAction(ISD::UDIV, MVT::v4i8, Expand); in InitAMDILLowering()
197 setOperationAction(ISD::UDIV, MVT::v2i16, Expand); in InitAMDILLowering()
198 setOperationAction(ISD::UDIV, MVT::v4i16, Expand); in InitAMDILLowering()
199 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Custom); in InitAMDILLowering()
200 setOperationAction(ISD::SUBC, MVT::Other, Expand); in InitAMDILLowering()
201 setOperationAction(ISD::ADDE, MVT::Other, Expand); in InitAMDILLowering()
202 setOperationAction(ISD::ADDC, MVT::Other, Expand); in InitAMDILLowering()
203 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in InitAMDILLowering()
204 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in InitAMDILLowering()
205 setOperationAction(ISD::BRIND, MVT::Other, Expand); in InitAMDILLowering()
206 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::Other, Expand); in InitAMDILLowering()
210 setOperationAction(ISD::ConstantFP , MVT::f32 , Legal); in InitAMDILLowering()
211 setOperationAction(ISD::Constant , MVT::i32 , Legal); in InitAMDILLowering()
268 case ISD::SELECT_CC: in computeMaskedBitsForTargetNode()
344 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data); in LowerSIGN_EXTEND_INREG()
350 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift); in LowerSIGN_EXTEND_INREG()
352 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift); in LowerSIGN_EXTEND_INREG()
416 SDValue jq = DAG.getNode(ISD::XOR, DL, OVT, LHS, RHS); in LowerSDIV24()
419 jq = DAG.getNode(ISD::SRA, DL, OVT, jq, DAG.getConstant(bitsize - 2, OVT)); in LowerSDIV24()
422 jq = DAG.getNode(ISD::OR, DL, OVT, jq, DAG.getConstant(1, OVT)); in LowerSDIV24()
434 SDValue fa = DAG.getNode(ISD::SINT_TO_FP, DL, FLTTY, ia); in LowerSDIV24()
437 SDValue fb = DAG.getNode(ISD::SINT_TO_FP, DL, FLTTY, ib); in LowerSDIV24()
443 fq = DAG.getNode(ISD::FTRUNC, DL, FLTTY, fq); in LowerSDIV24()
446 SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FLTTY, fq); in LowerSDIV24()
449 SDValue fr = DAG.getNode(ISD::FADD, DL, FLTTY, in LowerSDIV24()
450 DAG.getNode(ISD::MUL, DL, FLTTY, fqneg, fb), fa); in LowerSDIV24()
453 SDValue iq = DAG.getNode(ISD::FP_TO_SINT, DL, INTTY, fq); in LowerSDIV24()
456 fr = DAG.getNode(ISD::FABS, DL, FLTTY, fr); in LowerSDIV24()
459 fb = DAG.getNode(ISD::FABS, DL, FLTTY, fb); in LowerSDIV24()
464 cv = DAG.getSetCC(DL, INTTY, fr, fb, ISD::SETOGE); in LowerSDIV24()
466 cv = DAG.getSetCC(DL, INTTY, fr, fb, ISD::SETOGE); in LowerSDIV24()
469 jq = DAG.getNode(ISD::SELECT, DL, OVT, cv, jq, in LowerSDIV24()
473 iq = DAG.getNode(ISD::ADD, DL, OVT, iq, jq); in LowerSDIV24()
508 ISD::SETLT); in LowerSDIV32()
515 ISD::SETLT); in LowerSDIV32()
518 r0 = DAG.getNode(ISD::ADD, DL, OVT, r0, r10); in LowerSDIV32()
521 r1 = DAG.getNode(ISD::ADD, DL, OVT, r1, r11); in LowerSDIV32()
524 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32()
527 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSDIV32()
530 r0 = DAG.getNode(ISD::UDIV, DL, OVT, r0, r1); in LowerSDIV32()
533 r10 = DAG.getNode(ISD::XOR, DL, OVT, r10, r11); in LowerSDIV32()
536 r0 = DAG.getNode(ISD::ADD, DL, OVT, r0, r10); in LowerSDIV32()
539 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSDIV32()
560 LHS = DAG.getNode(ISD::SREM, DL, INTTY, LHS, RHS); in LowerSREM8()
577 LHS = DAG.getNode(ISD::SREM, DL, INTTY, LHS, RHS); in LowerSREM16()
610 SDValue r10 = DAG.getSetCC(DL, OVT, r0, DAG.getConstant(0, OVT), ISD::SETLT); in LowerSREM32()
613 SDValue r11 = DAG.getSetCC(DL, OVT, r1, DAG.getConstant(0, OVT), ISD::SETLT); in LowerSREM32()
616 r0 = DAG.getNode(ISD::ADD, DL, OVT, r0, r10); in LowerSREM32()
619 r1 = DAG.getNode(ISD::ADD, DL, OVT, r1, r11); in LowerSREM32()
622 r0 = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32()
625 r1 = DAG.getNode(ISD::XOR, DL, OVT, r1, r11); in LowerSREM32()
628 SDValue r20 = DAG.getNode(ISD::UREM, DL, OVT, r0, r1); in LowerSREM32()
634 r0 = DAG.getNode(ISD::SUB, DL, OVT, r0, r20); in LowerSREM32()
637 r0 = DAG.getNode(ISD::ADD, DL, OVT, r0, r10); in LowerSREM32()
640 SDValue DST = DAG.getNode(ISD::XOR, DL, OVT, r0, r10); in LowerSREM32()