258     const SDValue Op,  in computeMaskedBitsForTargetNode()  argument
266   switch (Op.getOpcode()) {  in computeMaskedBitsForTargetNode()
270                  Op.getOperand(1),  in computeMaskedBitsForTargetNode()
276                  Op.getOperand(0),  in computeMaskedBitsForTargetNode()
296 AMDGPUTargetLowering::LowerSDIV(SDValue Op, SelectionDAG &DAG) const {  in LowerSDIV()  argument
297   EVT OVT = Op.getValueType();  in LowerSDIV()
300     DST = LowerSDIV64(Op, DAG);  in LowerSDIV()
302     DST = LowerSDIV32(Op, DAG);  in LowerSDIV()
305     DST = LowerSDIV24(Op, DAG);  in LowerSDIV()
307     DST = SDValue(Op.getNode(), 0);  in LowerSDIV()
313 AMDGPUTargetLowering::LowerSREM(SDValue Op, SelectionDAG &DAG) const {  in LowerSREM()  argument
314   EVT OVT = Op.getValueType();  in LowerSREM()
317     DST = LowerSREM64(Op, DAG);  in LowerSREM()
319     DST = LowerSREM32(Op, DAG);  in LowerSREM()
321     DST = LowerSREM16(Op, DAG);  in LowerSREM()
323     DST = LowerSREM8(Op, DAG);  in LowerSREM()
325     DST = SDValue(Op.getNode(), 0);  in LowerSREM()
331 AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const {  in LowerSIGN_EXTEND_INREG()  argument
332   SDValue Data = Op.getOperand(0);  in LowerSIGN_EXTEND_INREG()
333   VTSDNode *BaseType = cast<VTSDNode>(Op.getOperand(1));  in LowerSIGN_EXTEND_INREG()
334   DebugLoc DL = Op.getDebugLoc();  in LowerSIGN_EXTEND_INREG()
356     Data = DAG.getSExtOrTrunc(Data, DL, Op.getOperand(0).getValueType());  in LowerSIGN_EXTEND_INREG()
383 AMDGPUTargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {  in LowerBRCOND()  argument
384   SDValue Chain = Op.getOperand(0);  in LowerBRCOND()
385   SDValue Cond  = Op.getOperand(1);  in LowerBRCOND()
386   SDValue Jump  = Op.getOperand(2);  in LowerBRCOND()
390       Op.getDebugLoc(),  in LowerBRCOND()
391       Op.getValueType(),  in LowerBRCOND()
397 AMDGPUTargetLowering::LowerSDIV24(SDValue Op, SelectionDAG &DAG) const {  in LowerSDIV24()  argument
398   DebugLoc DL = Op.getDebugLoc();  in LowerSDIV24()
399   EVT OVT = Op.getValueType();  in LowerSDIV24()
400   SDValue LHS = Op.getOperand(0);  in LowerSDIV24()
401   SDValue RHS = Op.getOperand(1);  in LowerSDIV24()
478 AMDGPUTargetLowering::LowerSDIV32(SDValue Op, SelectionDAG &DAG) const {  in LowerSDIV32()  argument
479   DebugLoc DL = Op.getDebugLoc();  in LowerSDIV32()
480   EVT OVT = Op.getValueType();  in LowerSDIV32()
481   SDValue LHS = Op.getOperand(0);  in LowerSDIV32()
482   SDValue RHS = Op.getOperand(1);  in LowerSDIV32()
544 AMDGPUTargetLowering::LowerSDIV64(SDValue Op, SelectionDAG &DAG) const {  in LowerSDIV64()  argument
545   return SDValue(Op.getNode(), 0);  in LowerSDIV64()
549 AMDGPUTargetLowering::LowerSREM8(SDValue Op, SelectionDAG &DAG) const {  in LowerSREM8()  argument
550   DebugLoc DL = Op.getDebugLoc();  in LowerSREM8()
551   EVT OVT = Op.getValueType();  in LowerSREM8()
558   SDValue LHS = DAG.getSExtOrTrunc(Op.getOperand(0), DL, INTTY);  in LowerSREM8()
559   SDValue RHS = DAG.getSExtOrTrunc(Op.getOperand(1), DL, INTTY);  in LowerSREM8()
566 AMDGPUTargetLowering::LowerSREM16(SDValue Op, SelectionDAG &DAG) const {  in LowerSREM16()  argument
567   DebugLoc DL = Op.getDebugLoc();  in LowerSREM16()
568   EVT OVT = Op.getValueType();  in LowerSREM16()
575   SDValue LHS = DAG.getSExtOrTrunc(Op.getOperand(0), DL, INTTY);  in LowerSREM16()
576   SDValue RHS = DAG.getSExtOrTrunc(Op.getOperand(1), DL, INTTY);  in LowerSREM16()
583 AMDGPUTargetLowering::LowerSREM32(SDValue Op, SelectionDAG &DAG) const {  in LowerSREM32()  argument
584   DebugLoc DL = Op.getDebugLoc();  in LowerSREM32()
585   EVT OVT = Op.getValueType();  in LowerSREM32()
586   SDValue LHS = Op.getOperand(0);  in LowerSREM32()
587   SDValue RHS = Op.getOperand(1);  in LowerSREM32()
645 AMDGPUTargetLowering::LowerSREM64(SDValue Op, SelectionDAG &DAG) const {  in LowerSREM64()  argument
646   return SDValue(Op.getNode(), 0);  in LowerSREM64()