Lines Matching refs:Opc
189 SDNode *SelectGather(SDNode *N, unsigned Opc);
190 SDNode *SelectAtomic64(SDNode *Node, unsigned Opc);
1491 SDNode *X86DAGToDAGISel::SelectAtomic64(SDNode *Node, unsigned Opc) { in SelectAtomic64() argument
1503 SDNode *ResNode = CurDAG->getMachineNode(Opc, Node->getDebugLoc(), in SelectAtomic64()
1726 unsigned Opc = 0; in SelectAtomicLoadArith() local
1731 Opc = AtomicOpcTbl[Op][ConstantI8]; in SelectAtomicLoadArith()
1733 Opc = AtomicOpcTbl[Op][I8]; in SelectAtomicLoadArith()
1738 Opc = AtomicOpcTbl[Op][SextConstantI16]; in SelectAtomicLoadArith()
1740 Opc = AtomicOpcTbl[Op][ConstantI16]; in SelectAtomicLoadArith()
1742 Opc = AtomicOpcTbl[Op][I16]; in SelectAtomicLoadArith()
1747 Opc = AtomicOpcTbl[Op][SextConstantI32]; in SelectAtomicLoadArith()
1749 Opc = AtomicOpcTbl[Op][ConstantI32]; in SelectAtomicLoadArith()
1751 Opc = AtomicOpcTbl[Op][I32]; in SelectAtomicLoadArith()
1754 Opc = AtomicOpcTbl[Op][I64]; in SelectAtomicLoadArith()
1757 Opc = AtomicOpcTbl[Op][SextConstantI64]; in SelectAtomicLoadArith()
1759 Opc = AtomicOpcTbl[Op][ConstantI64]; in SelectAtomicLoadArith()
1764 assert(Opc != 0 && "Invalid arith lock transform!"); in SelectAtomicLoadArith()
1773 Ret = SDValue(CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops, in SelectAtomicLoadArith()
1777 Ret = SDValue(CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops, in SelectAtomicLoadArith()
1850 static bool isLoadIncOrDecStore(StoreSDNode *StoreNode, unsigned Opc, in isLoadIncOrDecStore() argument
1855 if (!(Opc == X86ISD::DEC || Opc == X86ISD::INC)) return false; in isLoadIncOrDecStore()
1935 static unsigned getFusedLdStOpcode(EVT &LdVT, unsigned Opc) { in getFusedLdStOpcode() argument
1936 if (Opc == X86ISD::DEC) { in getFusedLdStOpcode()
1942 assert(Opc == X86ISD::INC && "unrecognized opcode"); in getFusedLdStOpcode()
1953 SDNode *X86DAGToDAGISel::SelectGather(SDNode *Node, unsigned Opc) { in SelectGather() argument
1972 SDNode *ResNode = CurDAG->getMachineNode(Opc, Node->getDebugLoc(), in SelectGather()
1985 unsigned Opc, MOpc; in Select() local
2018 unsigned Opc; in Select() local
2021 case Intrinsic::x86_avx2_gather_d_pd: Opc = X86::VGATHERDPDrm; break; in Select()
2022 case Intrinsic::x86_avx2_gather_d_pd_256: Opc = X86::VGATHERDPDYrm; break; in Select()
2023 case Intrinsic::x86_avx2_gather_q_pd: Opc = X86::VGATHERQPDrm; break; in Select()
2024 case Intrinsic::x86_avx2_gather_q_pd_256: Opc = X86::VGATHERQPDYrm; break; in Select()
2025 case Intrinsic::x86_avx2_gather_d_ps: Opc = X86::VGATHERDPSrm; break; in Select()
2026 case Intrinsic::x86_avx2_gather_d_ps_256: Opc = X86::VGATHERDPSYrm; break; in Select()
2027 case Intrinsic::x86_avx2_gather_q_ps: Opc = X86::VGATHERQPSrm; break; in Select()
2028 case Intrinsic::x86_avx2_gather_q_ps_256: Opc = X86::VGATHERQPSYrm; break; in Select()
2029 case Intrinsic::x86_avx2_gather_d_q: Opc = X86::VPGATHERDQrm; break; in Select()
2030 case Intrinsic::x86_avx2_gather_d_q_256: Opc = X86::VPGATHERDQYrm; break; in Select()
2031 case Intrinsic::x86_avx2_gather_q_q: Opc = X86::VPGATHERQQrm; break; in Select()
2032 case Intrinsic::x86_avx2_gather_q_q_256: Opc = X86::VPGATHERQQYrm; break; in Select()
2033 case Intrinsic::x86_avx2_gather_d_d: Opc = X86::VPGATHERDDrm; break; in Select()
2034 case Intrinsic::x86_avx2_gather_d_d_256: Opc = X86::VPGATHERDDYrm; break; in Select()
2035 case Intrinsic::x86_avx2_gather_q_d: Opc = X86::VPGATHERQDrm; break; in Select()
2036 case Intrinsic::x86_avx2_gather_q_d_256: Opc = X86::VPGATHERQDYrm; break; in Select()
2038 SDNode *RetVal = SelectGather(Node, Opc); in Select()
2062 unsigned Opc; in Select() local
2065 case X86ISD::ATOMOR64_DAG: Opc = X86::ATOMOR6432; break; in Select()
2066 case X86ISD::ATOMXOR64_DAG: Opc = X86::ATOMXOR6432; break; in Select()
2067 case X86ISD::ATOMADD64_DAG: Opc = X86::ATOMADD6432; break; in Select()
2068 case X86ISD::ATOMSUB64_DAG: Opc = X86::ATOMSUB6432; break; in Select()
2069 case X86ISD::ATOMNAND64_DAG: Opc = X86::ATOMNAND6432; break; in Select()
2070 case X86ISD::ATOMAND64_DAG: Opc = X86::ATOMAND6432; break; in Select()
2071 case X86ISD::ATOMMAX64_DAG: Opc = X86::ATOMMAX6432; break; in Select()
2072 case X86ISD::ATOMMIN64_DAG: Opc = X86::ATOMMIN6432; break; in Select()
2073 case X86ISD::ATOMUMAX64_DAG: Opc = X86::ATOMUMAX6432; break; in Select()
2074 case X86ISD::ATOMUMIN64_DAG: Opc = X86::ATOMUMIN6432; break; in Select()
2075 case X86ISD::ATOMSWAP64_DAG: Opc = X86::ATOMSWAP6432; break; in Select()
2077 SDNode *RetVal = SelectAtomic64(Node, Opc); in Select()
2176 case MVT::i8: LoReg = X86::AL; Opc = X86::MUL8r; break; in Select()
2177 case MVT::i16: LoReg = X86::AX; Opc = X86::MUL16r; break; in Select()
2178 case MVT::i32: LoReg = X86::EAX; Opc = X86::MUL32r; break; in Select()
2179 case MVT::i64: LoReg = X86::RAX; Opc = X86::MUL64r; break; in Select()
2187 SDNode *CNode = CurDAG->getMachineNode(Opc, dl, VTs, Ops, 2); in Select()
2205 case MVT::i8: Opc = X86::MUL8r; MOpc = X86::MUL8m; break; in Select()
2206 case MVT::i16: Opc = X86::MUL16r; MOpc = X86::MUL16m; break; in Select()
2207 case MVT::i32: Opc = hasBMI2 ? X86::MULX32rr : X86::MUL32r; in Select()
2209 case MVT::i64: Opc = hasBMI2 ? X86::MULX64rr : X86::MUL64r; in Select()
2215 case MVT::i8: Opc = X86::IMUL8r; MOpc = X86::IMUL8m; break; in Select()
2216 case MVT::i16: Opc = X86::IMUL16r; MOpc = X86::IMUL16m; break; in Select()
2217 case MVT::i32: Opc = X86::IMUL32r; MOpc = X86::IMUL32m; break; in Select()
2218 case MVT::i64: Opc = X86::IMUL64r; MOpc = X86::IMUL64m; break; in Select()
2223 switch (Opc) { in Select()
2286 if (Opc == X86::MULX32rr || Opc == X86::MULX64rr) { in Select()
2288 SDNode *CNode = CurDAG->getMachineNode(Opc, dl, VTs, Ops, in Select()
2295 SDNode *CNode = CurDAG->getMachineNode(Opc, dl, VTs, Ops, in Select()
2356 case MVT::i8: Opc = X86::DIV8r; MOpc = X86::DIV8m; break; in Select()
2357 case MVT::i16: Opc = X86::DIV16r; MOpc = X86::DIV16m; break; in Select()
2358 case MVT::i32: Opc = X86::DIV32r; MOpc = X86::DIV32m; break; in Select()
2359 case MVT::i64: Opc = X86::DIV64r; MOpc = X86::DIV64m; break; in Select()
2364 case MVT::i8: Opc = X86::IDIV8r; MOpc = X86::IDIV8m; break; in Select()
2365 case MVT::i16: Opc = X86::IDIV16r; MOpc = X86::IDIV16m; break; in Select()
2366 case MVT::i32: Opc = X86::IDIV32r; MOpc = X86::IDIV32m; break; in Select()
2367 case MVT::i64: Opc = X86::IDIV64r; MOpc = X86::IDIV64m; break; in Select()
2449 SDValue(CurDAG->getMachineNode(Opc, dl, MVT::Glue, N1, InFlag), 0); in Select()
2654 unsigned Opc = StoredVal->getOpcode(); in Select() local
2658 if (!isLoadIncOrDecStore(StoreNode, Opc, StoredVal, CurDAG, in Select()
2672 unsigned newOpc = getFusedLdStOpcode(LdVT, Opc); in Select()