Lines Matching refs:FP_TO_SINT
295 setOperationAction(ISD::FP_TO_SINT , MVT::i64 , Custom); in X86TargetLowering()
300 setOperationAction(ISD::FP_TO_SINT , MVT::i1 , Promote); in X86TargetLowering()
301 setOperationAction(ISD::FP_TO_SINT , MVT::i8 , Promote); in X86TargetLowering()
304 setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Promote); in X86TargetLowering()
306 setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom); in X86TargetLowering()
308 setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Custom); in X86TargetLowering()
309 setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom); in X86TargetLowering()
808 setOperationAction(ISD::FP_TO_SINT, VT, Expand); in X86TargetLowering()
976 setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal); in X86TargetLowering()
1118 setOperationAction(ISD::FP_TO_SINT, MVT::v8i16, Custom); in X86TargetLowering()
1120 setOperationAction(ISD::FP_TO_SINT, MVT::v8i32, Legal); in X86TargetLowering()
8565 DAG.getNode(ISD::FP_TO_SINT, Op.getDebugLoc(), in LowerFP_TO_SINT()
11620 Op = DAG.getNode(ISD::FP_TO_SINT, dl, VT, Op); in LowerShift()
12129 case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG); in LowerOperation()
12243 case ISD::FP_TO_SINT: in ReplaceNodeResults()
12245 bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT; in ReplaceNodeResults()