Lines Matching refs:v16i16
261 def : Pat<(v8i16 (extract_subvector (v16i16 VR256:$src), (iPTR 0))),
262 (v8i16 (EXTRACT_SUBREG (v16i16 VR256:$src), sub_xmm))>;
278 (INSERT_SUBREG (v16i16 (IMPLICIT_DEF)), VR128:$src, sub_xmm)>;
335 def : Pat<(v4f64 (bitconvert (v16i16 VR256:$src))), (v4f64 VR256:$src)>;
341 def : Pat<(v8f32 (bitconvert (v16i16 VR256:$src))), (v8f32 VR256:$src)>;
346 def : Pat<(v4i64 (bitconvert (v16i16 VR256:$src))), (v4i64 VR256:$src)>;
351 def : Pat<(v32i8 (bitconvert (v16i16 VR256:$src))), (v32i8 VR256:$src)>;
353 def : Pat<(v8i32 (bitconvert (v16i16 VR256:$src))), (v8i32 VR256:$src)>;
357 def : Pat<(v16i16 (bitconvert (v8f32 VR256:$src))), (v16i16 VR256:$src)>;
358 def : Pat<(v16i16 (bitconvert (v8i32 VR256:$src))), (v16i16 VR256:$src)>;
359 def : Pat<(v16i16 (bitconvert (v4i64 VR256:$src))), (v16i16 VR256:$src)>;
360 def : Pat<(v16i16 (bitconvert (v4f64 VR256:$src))), (v16i16 VR256:$src)>;
361 def : Pat<(v16i16 (bitconvert (v32i8 VR256:$src))), (v16i16 VR256:$src)>;
412 def : Pat<(v16i16 immAllZerosV), (AVX_SET0)>;
423 def : Pat<(v16i16 immAllZerosV), (SUBREG_TO_REG (i16 0), (V_SET0), sub_xmm)>;
990 def : Pat<(alignedstore256 (v16i16 VR256:$src), addr:$dst),
998 def : Pat<(store (v16i16 VR256:$src), addr:$dst),
1018 (v16i16 VR256:$src), (iPTR 0))), addr:$dst),
1037 (v16i16 VR256:$src), (iPTR 0))), addr:$dst),
3762 defm PADDW : PDI_binop_all<0xFD, "paddw", add, v8i16, v16i16,
3768 defm PMULLW : PDI_binop_all<0xD5, "pmullw", mul, v8i16, v16i16,
3772 defm PSUBW : PDI_binop_all<0xF9, "psubw", sub, v8i16, v16i16,
3780 defm PSUBUSW : PDI_binop_all<0xD9, "psubusw", X86subus, v8i16, v16i16,
3784 defm PMINSW : PDI_binop_all<0xEA, "pminsw", X86smin, v8i16, v16i16,
3788 defm PMAXSW : PDI_binop_all<0xEE, "pmaxsw", X86smax, v8i16, v16i16,
3881 VR256, v16i16, v8i16, bc_v8i16,
3891 VR256, v16i16, v8i16, bc_v8i16,
3901 VR256, v16i16, v8i16, bc_v8i16,
4012 defm PCMPEQW : PDI_binop_all<0x75, "pcmpeqw", X86pcmpeq, v8i16, v16i16,
4018 defm PCMPGTW : PDI_binop_all<0x65, "pcmpgtw", X86pcmpgt, v8i16, v16i16,
4098 defm PSHUFHW : sse2_pshuffle<"pshufhw", v8i16, v16i16, X86PShufhw>, XS;
4099 defm PSHUFLW : sse2_pshuffle<"pshuflw", v8i16, v16i16, X86PShuflw>, XD;
4179 defm VPUNPCKLWD : sse2_unpack_y<0x61, "vpunpcklwd", v16i16, X86Unpckl,
4188 defm VPUNPCKHWD : sse2_unpack_y<0x69, "vpunpckhwd", v16i16, X86Unpckh,
5192 defm VPHADDWY : SS3I_binop_rm<0x01, "vphaddw", X86hadd, v16i16, VR256,
5198 defm VPHSUBWY : SS3I_binop_rm<0x05, "vphsubw", X86hsub, v16i16, VR256,
5207 defm VPSIGNWY : SS3I_binop_rm<0x09, "vpsignw", X86psign, v16i16, VR256,
5312 def : Pat<(v16i16 (X86PAlignr VR256:$src1, VR256:$src2, (i8 imm:$imm))),
5664 def : Pat<(v16i16 (X86vsext (v16i8 VR128:$src))), (VPMOVSXBWYrr VR128:$src)>;
5673 def : Pat<(v16i16 (X86vsext (v32i8 VR256:$src))),
5680 def : Pat<(v8i32 (X86vsext (v16i16 VR256:$src))),
5682 def : Pat<(v4i64 (X86vsext (v16i16 VR256:$src))),
5776 def : Pat<(v16i16 (X86vzext (v16i8 VR128:$src))), (VPMOVZXBWYrr VR128:$src)>;
5785 def : Pat<(v16i16 (X86vzext (v32i8 VR256:$src))),
5792 def : Pat<(v8i32 (X86vzext (v16i16 VR256:$src))),
5794 def : Pat<(v4i64 (X86vzext (v16i16 VR256:$src))),
6622 defm VPMINUWY : SS48I_binop_rm<0x3A, "vpminuw", X86umin, v16i16, VR256,
6630 defm VPMAXUWY : SS48I_binop_rm<0x3E, "vpmaxuw", X86umax, v16i16, VR256,
6861 def : Pat<(v16i16 (X86Blendi (v16i16 VR256:$src1), (v16i16 VR256:$src2),
7499 def : Pat<(vinsertf128_insert:$ins (v16i16 VR256:$src1), (v8i16 VR128:$src2),
7518 def : Pat<(vinsertf128_insert:$ins (v16i16 VR256:$src1),
7572 (v16i16 VR256:$src1),
7587 def : Pat<(alignedstore (v8i16 (vextractf128_extract:$ext (v16i16 VR256:$src1),
7725 def : Pat<(v16i16 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
7737 def : Pat<(v16i16 (X86VPerm2x128 VR256:$src1,
7872 def : Pat<(v16i16 (X86VBroadcast (loadi16 addr:$src))),
7889 def : Pat<(v16i16 (X86VBroadcast (v8i16 VR128:$src))),
8041 def : Pat<(v16i16 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8047 def : Pat<(v16i16 (X86VPerm2x128 VR256:$src1,
8084 def : Pat<(vinsertf128_insert:$ins (v16i16 VR256:$src1), (v8i16 VR128:$src2),
8103 def : Pat<(vinsertf128_insert:$ins (v16i16 VR256:$src1),
8136 (v16i16 VR256:$src1),
8151 def : Pat<(alignedstore (v8i16 (vextractf128_extract:$ext (v16i16 VR256:$src1),