Lines Matching refs:inb
852 static Bit8u inb();
1126 inb(port)
1410 return inb(base_port + UART_LSR) & 0x20;
1422 while (!(inb(base_port + UART_LSR) & 0x40));
1754 while ( (inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x00);
1760 if (inb(0x64) & 0x01) {
1761 inb(0x60);
1777 while ( (inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x00);
1782 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x01);
1786 if ((inb(0x60) != 0x55)){
1795 while ((inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x10);
1800 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x11);
1805 if ((inb(0x60) != 0x00)) {
1819 while ((inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x20);
1824 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x21);
1828 if ((inb(0x60) != 0xfa)) {
1834 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x31);
1837 if ((inb(0x60) != 0xaa)) {
1846 while ((inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x40);
1851 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x41);
1855 if ((inb(0x60) != 0xfa)) {
1864 while ((inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x50);
1872 while ((inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x60);
1880 while ((inb(0x64) & 0x02) && (--max>0)) outb(0x80, 0x70);
1885 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x71);
1889 if ((inb(0x60) != 0xfa)) {
2183 oldval = inb(0x92);
2440 status = inb(base + ATA_CB_STAT); // for the times you're supposed to throw one away
2442 status = inb(base+ATA_CB_STAT);
2539 sc = inb(iobase1+ATA_CB_SC);
2540 sn = inb(iobase1+ATA_CB_SN);
2550 sc = inb(iobase1+ATA_CB_SC);
2551 sn = inb(iobase1+ATA_CB_SN);
2553 cl = inb(iobase1+ATA_CB_CL);
2554 ch = inb(iobase1+ATA_CB_CH);
2555 st = inb(iobase1+ATA_CB_STAT);
2816 sc = inb(iobase1+ATA_CB_SC);
2817 sn = inb(iobase1+ATA_CB_SN);
2877 status = inb(iobase1 + ATA_CB_STAT);
2908 status = inb(iobase1 + ATA_CB_STAT);
2969 status = inb(iobase1 + ATA_CB_STAT);
3028 status = inb(iobase1 + ATA_CB_STAT);
3059 status = inb(iobase1 + ATA_CB_STAT);
3121 status = inb(iobase1 + ATA_CB_STAT);
3194 status = inb(iobase1 + ATA_CB_STAT);
3208 status = inb(iobase1 + ATA_CB_STAT);
3245 status = inb(iobase1 + ATA_CB_STAT);
3253 status = inb(iobase2 + ATA_CB_ASTAT);
3260 status = inb(iobase1 + ATA_CB_STAT);
3261 sc = inb(iobase1 + ATA_CB_SC);
3264 if(((inb(iobase1 + ATA_CB_SC)&0x7)==0x3) &&
3277 lcount = ((Bit16u)(inb(iobase1 + ATA_CB_CH))<<8)+inb(iobase1 + ATA_CB_CL);
3757 outb(addr+3, inb(addr+3) | 0x80);
3767 regs.u.r8.ah = inb(addr+5);
3768 regs.u.r8.al = inb(addr+6);
3773 while (((inb(addr+5) & 0x60) != 0x60) && (timeout)) {
3781 regs.u.r8.ah = inb(addr+5);
3787 while (((inb(addr+5) & 0x01) == 0) && (timeout)) {
3796 regs.u.r8.al = inb(addr);
3798 regs.u.r8.ah = inb(addr+5);
3803 regs.u.r8.ah = inb(addr+5);
3804 regs.u.r8.al = inb(addr+6);
3846 regs.u.r8.al = (inb(0x92) >> 1) & 0x01;
3893 irqDisable = inb( 0xA1 );
4684 while ((inb(0x64) & 0x01) == 0) outb(0x80, 0x21);
4685 if ((inb(0x60) == 0xfa)) {
4689 while ((inb(0x64) & 0x01) == 0) outb(0x80, 0x21);
4690 inb(0x60);
4754 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x00);
4756 if ((inb(0x60) == 0xfa)) {
4759 while ( ((inb(0x64) & 0x01) == 0) && (--max>0) ) outb(0x80, 0x00);
4762 kbd_code |= (inb(0x60) << 8);
4864 if ( inb(0x64) & 0x02 )
4867 while ( (inb(0x64) & 0x01) != 0x01 );
4868 prev_command_byte = inb(0x60);
4871 if ( inb(0x64) & 0x02 )
4886 if ( inb(0x64) & 0x02 )
4889 while ( (inb(0x64) & 0x01) != 0x01 );
4890 command_byte = inb(0x60);
4892 if ( inb(0x64) & 0x02 )
4907 if ( inb(0x64) & 0x02 )
4922 while ( (inb(0x64) & 0x21) != 0x21 ) {
4925 response = inb(0x60);
4936 if ( inb(0x64) & 0x02 )
5172 in_byte = inb(0x64);
5176 in_byte = inb(0x60);
5346 status = inb(read_word(ebda_seg, &EbdaData->ata.channels[device/2].iobase1) + ATA_CB_STAT);
6421 status = inb(0x1f7);
6440 status = inb(0x1f7);
6493 status = inb(0x1f7);
6499 status = inb(0x1f7);
6560 status = inb(0x1f7);
6582 status = inb(0x1f7);
6633 status = inb(0x1f7);
6639 status = inb(0x1f7);
6747 status = inb(0x01f7);
6883 val8 = inb(0x03f2);
6889 val8 = inb(0x3f4);
6904 prev_reset = inb(0x03f2) & 0x04;
6918 val8 = inb(0x3f4);
7342 val8 = inb(0x3f4);
7348 return_status[0] = inb(0x3f5);
7349 return_status[1] = inb(0x3f5);
7350 return_status[2] = inb(0x3f5);
7351 return_status[3] = inb(0x3f5);
7352 return_status[4] = inb(0x3f5);
7353 return_status[5] = inb(0x3f5);
7354 return_status[6] = inb(0x3f5);
7476 val8 = inb(0x3f4);
7482 return_status[0] = inb(0x3f5);
7483 return_status[1] = inb(0x3f5);
7484 return_status[2] = inb(0x3f5);
7485 return_status[3] = inb(0x3f5);
7486 return_status[4] = inb(0x3f5);
7487 return_status[5] = inb(0x3f5);
7488 return_status[6] = inb(0x3f5);
7636 val8 = inb(0x3f4);
7642 return_status[0] = inb(0x3f5);
7643 return_status[1] = inb(0x3f5);
7644 return_status[2] = inb(0x3f5);
7645 return_status[3] = inb(0x3f5);
7646 return_status[4] = inb(0x3f5);
7647 return_status[5] = inb(0x3f5);
7648 return_status[6] = inb(0x3f5);
7914 val8 = inb(0x03f4) & 0x80; // Main Status Register
7948 val8 = inb(addr+2);
7954 while (((inb(addr+1) & 0x40) == 0x40) && (timeout)) {
7959 val8 = inb(addr+2);
7966 val8 = inb(addr+1);
8309 outb(0xa1, inb(0xa1) & 0xfe); // enable IRQ 8