Lines Matching refs:argL
1123 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk() local
1127 addInstr(env, mk_iMOVsd_RR(argL, hregAMD64_RDI()) ); in iselIntExpr_R_wrk()
1321 IRExpr* argL = e->Iex.Unop.arg->Iex.Binop.arg1; in iselIntExpr_R_wrk() local
1336 HReg reg = iselIntExpr_R(env, argL); in iselIntExpr_R_wrk()
2581 HReg argL = iselDblExpr(env, triop->arg2); in iselDblExpr_wrk() local
2583 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselDblExpr_wrk()
3071 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk() local
3074 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3091 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk() local
3094 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3110 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk() local
3113 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3129 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk() local
3132 addInstr(env, mk_vMOVsd_RR(argL, dst)); in iselVecExpr_wrk()
3271 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk() local
3298 addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argL, in iselVecExpr_wrk()
3322 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk() local
3345 addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argL, in iselVecExpr_wrk()