Lines Matching refs:vassert
64 vassert(r >= 0 && r < 16); in ppHRegARM()
69 vassert(r >= 0 && r < 32); in ppHRegARM()
74 vassert(r >= 0 && r < 32); in ppHRegARM()
79 vassert(r >= 0 && r < 16); in ppHRegARM()
187 vassert(i == *nregs); in getAllocableRegs_ARM()
224 vassert(-4095 <= simm13 && simm13 <= 4095); in ARMAMode1_RI()
233 vassert(0 <= shift && shift <= 3); in ARMAMode1_RRS()
252 vassert(0); in ppARMAMode1()
292 vassert(-255 <= simm9 && simm9 <= 255); in ARMAMode2_RI()
318 vassert(0); in ppARMAMode2()
355 vassert(simm11 >= -1020 && simm11 <= 1020); in mkARMAModeV()
356 vassert(0 == (simm11 & 3)); in mkARMAModeV()
430 vassert(sh >= 0 && sh < 32); in ROR32()
442 vassert(imm8 >= 0 && imm8 <= 255); in ARMRI84_I84()
443 vassert(imm4 >= 0 && imm4 <= 15); in ARMRI84_I84()
463 vassert(0); in ppARMRI84()
498 vassert(imm5 > 0 && imm5 <= 31); // zero is not allowed in ARMRI5_I5()
517 vassert(0); in ppARMRI5()
1216 vassert(cond != ARMcc_AL); in ARMInstr_CMov()
1246 vassert(szB == 8 || szB == 4 || szB == 2 || szB == 1); in ARMInstr_LdrEX()
1253 vassert(szB == 8 || szB == 4 || szB == 2 || szB == 1); in ARMInstr_StrEX()
1319 vassert(cond != ARMcc_AL); in ARMInstr_VCMovD()
1328 vassert(cond != ARMcc_AL); in ARMInstr_VCMovS()
1466 vassert(cond != ARMcc_AL); in ARMInstr_NCMovQ()
1496 vassert(i == 16); in fitsIn8x4()
1695 default: vassert(0); in ppARMInstr()
1706 default: vassert(0); in ppARMInstr()
1991 vassert(mode64 == False); in getRegUsage_ARMInstr()
2289 vassert(mode64 == False); in mapRegs_ARMInstr()
2534 vassert(offsetB >= 0); in genSpill_ARM()
2535 vassert(!hregIsVirtual(rreg)); in genSpill_ARM()
2536 vassert(mode64 == False); in genSpill_ARM()
2541 vassert(offsetB <= 4095); in genSpill_ARM()
2551 vassert(0 == (offsetB & 3)); in genSpill_ARM()
2560 vassert(offsetB <= 1020); in genSpill_ARM()
2589 vassert(offsetB >= 0); in genReload_ARM()
2590 vassert(!hregIsVirtual(rreg)); in genReload_ARM()
2591 vassert(mode64 == False); in genReload_ARM()
2596 vassert(offsetB <= 4095); in genReload_ARM()
2606 vassert(0 == (offsetB & 3)); in genReload_ARM()
2615 vassert(offsetB <= 1020); in genReload_ARM()
2648 vassert(hregClass(r) == HRcInt32); in iregNo()
2649 vassert(!hregIsVirtual(r)); in iregNo()
2651 vassert(n <= 15); in iregNo()
2660 vassert(hregClass(r) == HRcFlt64); in dregNo()
2661 vassert(!hregIsVirtual(r)); in dregNo()
2663 vassert(n <= 31); in dregNo()
2670 vassert(hregClass(r) == HRcFlt32); in fregNo()
2671 vassert(!hregIsVirtual(r)); in fregNo()
2673 vassert(n <= 31); in fregNo()
2680 vassert(hregClass(r) == HRcVec128); in qregNo()
2681 vassert(!hregIsVirtual(r)); in qregNo()
2683 vassert(n <= 15); in qregNo()
2743 vassert(0 == (ri->ARMri84.I84.imm4 & ~0x0F)); in skeletal_RI84()
2744 vassert(0 == (ri->ARMri84.I84.imm8 & ~0xFF)); in skeletal_RI84()
2762 vassert(imm5 >= 1 && imm5 <= 31); in skeletal_RI5()
2778 vassert(rD >= 0 && rD <= 14); // r15 not good to mess with! in imm32_to_iregNo()
2873 vassert(0); /* lose */ in imm32_to_iregNo_EXACTLY2()
2895 vassert(0); /* lose */ in is_imm32_to_iregNo_EXACTLY2()
2903 vassert(rD <= 12); in do_load_or_store32()
2904 vassert(am->tag == ARMam1_RI); // RR case is not handled in do_load_or_store32()
2916 vassert(simm12 >= 0 && simm12 <= 4095); in do_load_or_store32()
2941 vassert(nbuf >= 32); in emit_ARMInstr()
2942 vassert(mode64 == False); in emit_ARMInstr()
2943 vassert(0 == (((HWord)buf) & 3)); in emit_ARMInstr()
3068 vassert(simm12 >= 0 && simm12 <= 4095); in emit_ARMInstr()
3096 vassert(simm8 >= 0 && simm8 <= 255); in emit_ARMInstr()
3099 vassert(!(bL == 0 && bS == 1)); // "! signed store" in emit_ARMInstr()
3117 else vassert(0); // ill-constructed insn in emit_ARMInstr()
3132 vassert(disp_cp_chain_me_to_slowEP != NULL); in emit_ARMInstr()
3133 vassert(disp_cp_chain_me_to_fastEP != NULL); in emit_ARMInstr()
3142 vassert(i->ARMin.XDirect.cond != ARMcc_NV); in emit_ARMInstr()
3174 vassert(delta > 0 && delta < 40); in emit_ARMInstr()
3175 vassert((delta & 3) == 0); in emit_ARMInstr()
3177 vassert(notCond <= 13); /* Neither AL nor NV */ in emit_ARMInstr()
3191 vassert(disp_cp_xindir != NULL); in emit_ARMInstr()
3200 vassert(i->ARMin.XIndir.cond != ARMcc_NV); in emit_ARMInstr()
3221 vassert(delta > 0 && delta < 40); in emit_ARMInstr()
3222 vassert((delta & 3) == 0); in emit_ARMInstr()
3224 vassert(notCond <= 13); /* Neither AL nor NV */ in emit_ARMInstr()
3239 vassert(i->ARMin.XAssisted.cond != ARMcc_NV); in emit_ARMInstr()
3273 vassert(trcval != 0); in emit_ARMInstr()
3286 vassert(delta > 0 && delta < 40); in emit_ARMInstr()
3287 vassert((delta & 3) == 0); in emit_ARMInstr()
3289 vassert(notCond <= 13); /* Neither AL nor NV */ in emit_ARMInstr()
3316 default: vassert(0); in emit_ARMInstr()
3337 default: vassert(0); in emit_ARMInstr()
3389 vassert(0 == (off8 & 3)); in emit_ARMInstr()
3391 vassert(0 == (off8 & 0xFFFFFF00)); in emit_ARMInstr()
3406 vassert(0 == (off8 & 3)); in emit_ARMInstr()
3408 vassert(0 == (off8 & 0xFFFFFF00)); in emit_ARMInstr()
3426 vassert(pqrs != X1111); in emit_ARMInstr()
3451 vassert(pqrs != X1111); in emit_ARMInstr()
3528 vassert(cc < 16 && cc != ARMcc_AL); in emit_ARMInstr()
3537 vassert(cc < 16 && cc != ARMcc_AL); in emit_ARMInstr()
3639 vassert(0); in emit_ARMInstr()
3674 vassert(hregClass(i->ARMin.NLdStQ.dQ) == HRcVec128); in emit_ARMInstr()
3694 vassert(hregClass(i->ARMin.NLdStD.dD) == HRcFlt64); in emit_ARMInstr()
3954 vassert(sz1 + sz2 < 2); in emit_ARMInstr()
4442 vassert(cc < 16 && cc != ARMcc_AL && cc != ARMcc_NV); in emit_ARMInstr()
4456 vassert(regD != regN); in emit_ARMInstr()
4488 vassert(evCheckSzB_ARM() == (UChar*)p - (UChar*)p0); in emit_ARMInstr()
4515 vassert(!(*is_profInc)); in emit_ARMInstr()
4531 vassert(((UChar*)p) - &buf[0] <= 32); in emit_ARMInstr()
4560 vassert(0 == (3 & (HWord)p)); in chainXDirect_ARM()
4561 vassert(is_imm32_to_iregNo_EXACTLY2( in chainXDirect_ARM()
4563 vassert(p[2] == 0xE12FFF3C); in chainXDirect_ARM()
4594 vassert(0 == (delta & (Long)3)); in chainXDirect_ARM()
4610 vassert(simm24 == ((simm24 << 8) >> 8)); in chainXDirect_ARM()
4648 vassert(0 == (3 & (HWord)p)); in unchainXDirect_ARM()
4668 vassert(valid); in unchainXDirect_ARM()
4691 vassert(sizeof(ULong*) == 4); in patchProfInc_ARM()
4693 vassert(0 == (3 & (HWord)p)); in patchProfInc_ARM()
4694 vassert(is_imm32_to_iregNo_EXACTLY2(p, /*r*/12, 0x65556555)); in patchProfInc_ARM()
4695 vassert(p[2] == 0xE59CB000); in patchProfInc_ARM()
4696 vassert(p[3] == 0xE29BB001); in patchProfInc_ARM()
4697 vassert(p[4] == 0xE58CB000); in patchProfInc_ARM()
4698 vassert(p[5] == 0xE59CB004); in patchProfInc_ARM()
4699 vassert(p[6] == 0xE2ABB000); in patchProfInc_ARM()
4700 vassert(p[7] == 0xE58CB004); in patchProfInc_ARM()