Lines Matching refs:mode64
56 static Bool mode64 = False; variable
118 Bool mode64; member
148 vassert(env->mode64); in lookupIRTempPair()
160 ppMIPSInstr(instr, mode64); in addInstr()
167 HReg reg = mkHReg(env->vreg_ctr, HRcGPR(env->mode64), in newVRegI()
182 HReg reg = mkHReg(env->vreg_ctr, HRcFPR(env->mode64), in newVRegF()
190 HReg sp = StackPointer(mode64); in add_to_sp()
198 HReg sp = StackPointer(mode64); in sub_from_sp()
279 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in set_MIPS_rounding_mode()
282 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64)); in set_MIPS_rounding_mode()
293 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in set_MIPS_rounding_default()
295 addInstr(env, MIPSInstr_Load(4, fcsr, am_addr, mode64)); in set_MIPS_rounding_default()
346 am_addr0 = MIPSAMode_IR(0, StackPointer(mode64)); in mk_LoadRR32toFPR()
347 am_addr1 = MIPSAMode_IR(8, StackPointer(mode64)); in mk_LoadRR32toFPR()
350 addInstr(env, MIPSInstr_Store(4, am_addr0, r_srcLo, mode64)); in mk_LoadRR32toFPR()
351 addInstr(env, MIPSInstr_Store(4, am_addr1, r_srcHi, mode64)); in mk_LoadRR32toFPR()
394 argregs[0] = hregMIPS_GPR4(mode64); in doHelperCall()
395 argregs[1] = hregMIPS_GPR5(mode64); in doHelperCall()
396 argregs[2] = hregMIPS_GPR6(mode64); in doHelperCall()
397 argregs[3] = hregMIPS_GPR7(mode64); in doHelperCall()
429 addInstr(env, MIPSInstr_Store(4, MIPSAMode_IR(0, StackPointer(mode64)), in doHelperCall()
430 GuestStatePointer(mode64), mode64)); in doHelperCall()
440 GuestStatePointer(mode64))); in doHelperCall()
453 vassert(mode64); in doHelperCall()
470 GuestStatePointer(mode64))); in doHelperCall()
480 vassert(mode64); in doHelperCall()
514 if (mode64) in doHelperCall()
525 addInstr(env, MIPSInstr_Load(4, GuestStatePointer(mode64), in doHelperCall()
526 MIPSAMode_IR(0, StackPointer(mode64)), mode64)); in doHelperCall()
553 return toBool(hregClass(am->Mam.IR.base) == HRcGPR(mode64) && in sane_AMode()
557 return toBool(hregClass(am->Mam.RR.base) == HRcGPR(mode64) && in sane_AMode()
559 hregClass(am->Mam.RR.index) == HRcGPR(mode64) && in sane_AMode()
628 vassert(hregClass(r) == HRcGPR(env->mode64)); in iselWordExpr_R()
638 || ty == Ity_F32 || (ty == Ity_I64 && mode64) in iselWordExpr_R_wrk()
639 || (ty == Ity_I128 && mode64)); in iselWordExpr_R_wrk()
656 r_dst, am_addr, mode64)); in iselWordExpr_R_wrk()
762 vassert(mode64); in iselWordExpr_R_wrk()
1028 vassert(mode64); in iselWordExpr_R_wrk()
1059 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselWordExpr_R_wrk()
1064 addInstr(env, MIPSInstr_Load(4, r_dst, am_addr, mode64)); in iselWordExpr_R_wrk()
1152 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselWordExpr_R_wrk()
1158 addInstr(env, MIPSInstr_Load(4, r_dst, am_addr, mode64)); in iselWordExpr_R_wrk()
1165 vassert(mode64); in iselWordExpr_R_wrk()
1171 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselWordExpr_R_wrk()
1177 addInstr(env, MIPSInstr_Load(8, r_dst, am_addr, mode64)); in iselWordExpr_R_wrk()
1188 vassert(mode64); in iselWordExpr_R_wrk()
1228 vassert(mode64); in iselWordExpr_R_wrk()
1241 vassert(mode64); in iselWordExpr_R_wrk()
1250 vassert(mode64); in iselWordExpr_R_wrk()
1266 vassert(env->mode64); in iselWordExpr_R_wrk()
1275 vassert(mode64); in iselWordExpr_R_wrk()
1292 hregMIPS_GPR0(mode64), cc)); in iselWordExpr_R_wrk()
1305 hregMIPS_GPR0(mode64), cc)); in iselWordExpr_R_wrk()
1313 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64), in iselWordExpr_R_wrk()
1326 if (op_unop == Iop_Left64 && !mode64) in iselWordExpr_R_wrk()
1330 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64), in iselWordExpr_R_wrk()
1355 addInstr(env, MIPSInstr_Cmp(False, !(env->mode64), r_dst, r_src, in iselWordExpr_R_wrk()
1356 hregMIPS_GPR0(mode64), cc)); in iselWordExpr_R_wrk()
1363 vassert(env->mode64); in iselWordExpr_R_wrk()
1366 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, hregMIPS_GPR0(mode64), in iselWordExpr_R_wrk()
1376 vassert(mode64); in iselWordExpr_R_wrk()
1383 vassert(mode64); in iselWordExpr_R_wrk()
1398 || ((ty == Ity_I64) && mode64)) { in iselWordExpr_R_wrk()
1402 GuestStatePointer(mode64)); in iselWordExpr_R_wrk()
1404 mode64)); in iselWordExpr_R_wrk()
1450 if (!mode64) in iselWordExpr_R_wrk()
1477 if (e->Iex.CCall.retty != Ity_I32 && !mode64) in iselWordExpr_R_wrk()
1482 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64))); in iselWordExpr_R_wrk()
1520 vassert(hregClass(ri->Mrh.Reg.reg) == HRcGPR(env->mode64)); in iselWordExpr_RH()
1535 ((ty == Ity_I64) && env->mode64)); in iselWordExpr_RH_wrk()
1544 vassert(env->mode64); in iselWordExpr_RH_wrk()
1704 MIPSAMode *am_addr = MIPSAMode_IR(0, GuestStatePointer(mode64)); in iselCondCode_wrk()
1708 dst, mode64)); in iselCondCode_wrk()
1719 MIPSAMode *am_addr = MIPSAMode_IR(0, GuestStatePointer(mode64)); in iselCondCode_wrk()
1723 r_dst, mode64)); in iselCondCode_wrk()
1729 MIPSAMode *am_addr = MIPSAMode_IR(0, GuestStatePointer(mode64)); in iselCondCode_wrk()
1733 r_dst, mode64)); in iselCondCode_wrk()
1754 vassert(env->mode64); in iselInt128Expr()
1761 vassert(hregClass(*rHi) == HRcGPR(env->mode64)); in iselInt128Expr()
1763 vassert(hregClass(*rLo) == HRcGPR(env->mode64)); in iselInt128Expr()
1824 vassert(mode64); in iselInt128Expr_wrk()
1860 vassert(!env->mode64); in iselInt64Expr()
1884 addInstr(env, MIPSInstr_Load(4, tHi, MIPSAMode_IR(0, r_addr), mode64)); in iselInt64Expr_wrk()
1885 addInstr(env, MIPSInstr_Load(4, tLo, MIPSAMode_IR(4, r_addr), mode64)); in iselInt64Expr_wrk()
1921 GuestStatePointer(mode64)); in iselInt64Expr_wrk()
1922 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64)); in iselInt64Expr_wrk()
1923 addInstr(env, MIPSInstr_Load(4, tHi, nextMIPSAModeInt(am_addr), mode64)); in iselInt64Expr_wrk()
2093 addInstr(env, MIPSInstr_Alu(Malu_ADD, tHi, hregMIPS_GPR0(mode64), in iselInt64Expr_wrk()
2094 MIPSRH_Reg(hregMIPS_GPR0(mode64)))); in iselInt64Expr_wrk()
2111 addInstr(env, MIPSInstr_Alu(Malu_SUB, tmp2, hregMIPS_GPR0(mode64), in iselInt64Expr_wrk()
2129 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselInt64Expr_wrk()
2135 addInstr(env, MIPSInstr_Load(4, tLo, am_addr, mode64)); in iselInt64Expr_wrk()
2137 mode64)); in iselInt64Expr_wrk()
2177 vassert(ty == Ity_F32 || (ty == Ity_F64 && mode64)); in iselFltExpr_wrk()
2187 || (e->Iex.Load.ty == Ity_F64 && mode64)); in iselFltExpr_wrk()
2196 GuestStatePointer(mode64)); in iselFltExpr_wrk()
2209 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselFltExpr_wrk()
2212 addInstr(env, MIPSInstr_Store(4, am_addr, fr_src, mode64)); in iselFltExpr_wrk()
2228 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselFltExpr_wrk()
2233 hregMIPS_GPR0(mode64), mode64)); in iselFltExpr_wrk()
2244 vassert(mode64); in iselFltExpr_wrk()
2250 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselFltExpr_wrk()
2253 addInstr(env, MIPSInstr_Store(8, am_addr, fr_src, mode64)); in iselFltExpr_wrk()
2351 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselFltExpr_wrk()
2354 addInstr(env, MIPSInstr_Store(4, am_addr, fr_src, mode64)); in iselFltExpr_wrk()
2417 MIPSAMode *zero_r1 = MIPSAMode_IR(0, StackPointer(mode64)); in iselFltExpr_wrk()
2467 GuestStatePointer(mode64)); in iselDblExpr_wrk()
2487 MIPSAMode *am_addr1 = MIPSAMode_IR(284, GuestStatePointer(mode64)); in iselDblExpr_wrk()
2489 addInstr(env, MIPSInstr_Load(4, irrm, am_addr1, mode64)); in iselDblExpr_wrk()
2504 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselDblExpr_wrk()
2507 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64)); in iselDblExpr_wrk()
2533 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselDblExpr_wrk()
2536 addInstr(env, MIPSInstr_Store(4, am_addr, r_src, mode64)); in iselDblExpr_wrk()
2545 MIPSAMode *am_addr1 = MIPSAMode_IR(284, GuestStatePointer(mode64)); in iselDblExpr_wrk()
2547 addInstr(env, MIPSInstr_Load(4, irrm, am_addr1, mode64)); in iselDblExpr_wrk()
2561 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselDblExpr_wrk()
2564 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64)); in iselDblExpr_wrk()
2673 MIPSAMode *am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselDblExpr_wrk()
2679 addInstr(env, MIPSInstr_Load(4, r_r0_lo, am_addr, mode64)); in iselDblExpr_wrk()
2681 mode64)); in iselDblExpr_wrk()
2694 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselDblExpr_wrk()
2700 addInstr(env, MIPSInstr_Load(4, r_rX_lo, am_addr, mode64)); in iselDblExpr_wrk()
2702 mode64)); in iselDblExpr_wrk()
2717 am_addr = MIPSAMode_IR(0, StackPointer(mode64)); in iselDblExpr_wrk()
2720 addInstr(env, MIPSInstr_Store(4, am_addr, r_dst_lo, mode64)); in iselDblExpr_wrk()
2722 r_dst_hi, mode64)); in iselDblExpr_wrk()
2761 (mode64 && (tyd == Ity_I64))) { in iselStmt()
2764 am_addr, r_src, mode64)); in iselStmt()
2767 if (!mode64 && (tyd == Ity_I64)) { in iselStmt()
2774 MIPSAMode_IR(0, r_addr), vHi, mode64)); in iselStmt()
2776 MIPSAMode_IR(4, r_addr), vLo, mode64)); in iselStmt()
2794 (ty == Ity_I64 && mode64)) { in iselStmt()
2797 GuestStatePointer(mode64)); in iselStmt()
2799 am_addr, r_src, mode64)); in iselStmt()
2803 if (ty == Ity_I64 && !mode64) { in iselStmt()
2806 GuestStatePointer(mode64)); in iselStmt()
2808 GuestStatePointer(mode64)); in iselStmt()
2811 am_addr, vLo, mode64)); in iselStmt()
2813 am_addr4, vHi, mode64)); in iselStmt()
2821 GuestStatePointer(mode64)); in iselStmt()
2831 GuestStatePointer(mode64)); in iselStmt()
2895 if (retty == Ity_I64 && !mode64) { in iselStmt()
2901 || (retty == Ity_I64 && mode64)) { in iselStmt()
2905 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64))); in iselStmt()
2920 if (!mode64 && (tyAddr != Ity_I32)) in iselStmt()
2931 addInstr(env, MIPSInstr_Load(4, r_dst, r_addr, mode64)); in iselStmt()
2933 } else if (tyRes == Ity_I64 && mode64) { in iselStmt()
2934 addInstr(env, MIPSInstr_Load(8, r_dst, r_addr, mode64)); in iselStmt()
2948 addInstr(env, MIPSInstr_Store(4, r_addr, r_src, mode64)); in iselStmt()
2951 } else if (tyData == Ity_I64 && mode64) { in iselStmt()
2952 addInstr(env, MIPSInstr_Store(8, r_addr, r_src, mode64)); in iselStmt()
2980 if (!mode64 && dst->tag != Ico_U32) in iselStmt()
2982 if (mode64 && dst->tag != Ico_U64) in iselStmt()
2987 hregMIPS_GPR10(mode64)); in iselStmt()
2998 = mode64 in iselStmt()
3003 mode64 ? (Addr64)stmt->Ist.Exit.dst->Ico.U64 in iselStmt()
3070 vassert(cdst->tag == (env->mode64 ? Ico_U64 :Ico_U32)); in iselNext()
3073 MIPSAMode* amPC = MIPSAMode_IR(offsIP, hregMIPS_GPR10(env->mode64)); in iselNext()
3079 = env->mode64 in iselNext()
3084 env->mode64 ? (Addr64)cdst->Ico.U64 in iselNext()
3104 MIPSAMode* amPC = MIPSAMode_IR(offsIP, hregMIPS_GPR10(env->mode64)); in iselNext()
3130 MIPSAMode* amPC = MIPSAMode_IR(offsIP, hregMIPS_GPR10(env->mode64)); in iselNext()
3172 mode64 = arch_host != VexArchMIPS32; in iselSB_MIPS()
3177 env->mode64 = mode64; in iselSB_MIPS()
3216 vassert(mode64); in iselSB_MIPS()
3237 amCounter = MIPSAMode_IR(offs_Host_EvC_Counter, hregMIPS_GPR10(mode64)); in iselSB_MIPS()
3238 amFailAddr = MIPSAMode_IR(offs_Host_EvC_FailAddr, hregMIPS_GPR10(mode64)); in iselSB_MIPS()