Lines Matching refs:i32

11 declare float @llvm.powi.f32(float, i32) nounwind readonly
13 define <3 x float> @_Z4powiDv3_fi(<3 x float> %f3, i32 %exp) nounwind readnone {
14   %x = extractelement <3 x float> %f3, i32 0      ; <float> [#uses=1]
15   %y = extractelement <3 x float> %f3, i32 1      ; <float> [#uses=1]
16   %z = extractelement <3 x float> %f3, i32 2      ; <float> [#uses=1]
17   %retx = tail call float @llvm.powi.f32(float %x, i32 %exp) ; <float> [#uses=1]
18   %rety = tail call float @llvm.powi.f32(float %y, i32 %exp) ; <float> [#uses=1]
19   %retz = tail call float @llvm.powi.f32(float %z, i32 %exp) ; <float> [#uses=1]
20   %tmp1 = insertelement <3 x float> %f3, float %retx, i32 0 ; <<3 x float>> [#uses=1]
21   %tmp2 = insertelement <3 x float> %tmp1, float %rety, i32 1 ; <<3 x float>> [#uses=1]
22   %ret = insertelement <3 x float> %tmp2, float %retz, i32 2 ; <<3 x float>> [#uses=1]
29   %x = extractelement <3 x float> %f3, i32 0      ; <float> [#uses=1]
30   %y = extractelement <3 x float> %f3, i32 1      ; <float> [#uses=1]
31   %z = extractelement <3 x float> %f3, i32 2      ; <float> [#uses=1]
35   %tmp1 = insertelement <3 x float> %f3, float %retx, i32 0 ; <<3 x float>> [#uses=1]
36   %tmp2 = insertelement <3 x float> %tmp1, float %rety, i32 1 ; <<3 x float>> [#uses=1]
37   %ret = insertelement <3 x float> %tmp2, float %retz, i32 2 ; <<3 x float>> [#uses=1]
41 declare <4 x i32> @llvm.arm.neon.vmlals.v4i32(<4 x i32>, <4 x i16>, <4 x i16>)
43 define <4 x i32> @foo(<4 x i32> %a, <4 x i16> %b, <4 x i16> %c) {
44   %A = tail call <4 x i32> @llvm.arm.neon.vmlals.v4i32(<4 x i32> %a, <4 x i16> %b, <4 x i16> %c)
45   ret <4 x i32> %A
48 define i32 @test4() {
49   %ret4 = call <4 x i32> @foo(<4 x i32> undef, <4 x i16> undef, <4 x i16> undef)
50   %retx = extractelement <4 x i32> %ret4, i32 0
51   %rety = extractelement <4 x i32> %ret4, i32 1
52   %retz = extractelement <4 x i32> %ret4, i32 2
53   %ret1 = add i32 %retx, %rety
54   %ret2 = add i32 %ret1, %retz
55   ret i32 %ret2