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1 
2 /*--------------------------------------------------------------------*/
3 /*--- begin                               guest_generic_bb_to_IR.h ---*/
4 /*--------------------------------------------------------------------*/
5 
6 /*
7    This file is part of Valgrind, a dynamic binary instrumentation
8    framework.
9 
10    Copyright (C) 2004-2012 OpenWorks LLP
11       info@open-works.net
12 
13    This program is free software; you can redistribute it and/or
14    modify it under the terms of the GNU General Public License as
15    published by the Free Software Foundation; either version 2 of the
16    License, or (at your option) any later version.
17 
18    This program is distributed in the hope that it will be useful, but
19    WITHOUT ANY WARRANTY; without even the implied warranty of
20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
21    General Public License for more details.
22 
23    You should have received a copy of the GNU General Public License
24    along with this program; if not, write to the Free Software
25    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26    02110-1301, USA.
27 
28    The GNU General Public License is contained in the file COPYING.
29 
30    Neither the names of the U.S. Department of Energy nor the
31    University of California nor the names of its contributors may be
32    used to endorse or promote products derived from this software
33    without prior written permission.
34 */
35 
36 #ifndef __VEX_GUEST_GENERIC_BB_TO_IR_H
37 #define __VEX_GUEST_GENERIC_BB_TO_IR_H
38 
39 
40 /* This defines stuff needed by the guest insn disassemblers.
41    It's a bit circular; is imported by
42    - the guest-specific toIR.c files (guest-{x86,amd64,ppc,arm}/toIR.c)
43    - the generic disassembly driver (bb_to_IR.c)
44    - vex_main.c
45 */
46 
47 
48 /* ---------------------------------------------------------------
49    Result of disassembling an instruction
50    --------------------------------------------------------------- */
51 
52 /* The results of disassembling an instruction.  There are three
53    possible outcomes.  For Dis_Resteer, the disassembler _must_
54    continue at the specified address.  For Dis_StopHere, the
55    disassembler _must_ terminate the BB.  For Dis_Continue, we may at
56    our option either disassemble the next insn, or terminate the BB;
57    but in the latter case we must set the bb's ->next field to point
58    to the next instruction.  */
59 
60 typedef
61 
62    struct {
63 
64       /* The disassembled insn has this length.  Must always be
65          set. */
66       Int len;
67 
68       /* What happens next?
69          Dis_StopHere:  this insn terminates the BB; we must stop.
70          Dis_Continue:  we can optionally continue into the next insn
71          Dis_ResteerU:  followed an unconditional branch; continue at
72                         'continueAt'
73          Dis_ResteerC:  (speculatively, of course) followed a
74                         conditional branch; continue at 'continueAt'
75       */
76       enum { Dis_StopHere, Dis_Continue,
77              Dis_ResteerU, Dis_ResteerC } whatNext;
78 
79       /* For Dis_StopHere, we need to end the block and create a
80          transfer to whatever the NIA is.  That will have presumably
81          been set by the IR generated for this insn.  So we need to
82          know the jump kind to use.  Should Ijk_INVALID in other Dis_
83          cases. */
84       IRJumpKind jk_StopHere;
85 
86       /* For Dis_Resteer, this is the guest address we should continue
87          at.  Otherwise ignored (should be zero). */
88       Addr64 continueAt;
89 
90    }
91 
92    DisResult;
93 
94 
95 /* ---------------------------------------------------------------
96    The type of a function which disassembles one instruction.
97    C's function-type syntax is really astonishing bizarre.
98    --------------------------------------------------------------- */
99 
100 /* A function of this type (DisOneInstrFn) disassembles an instruction
101    located at host address &guest_code[delta], whose guest IP is
102    guest_IP (this may be entirely unrelated to where the insn is
103    actually located in the host's address space.).  The returned
104    DisResult.len field carries its size.  If the returned
105    DisResult.whatNext field is Dis_Resteer then DisResult.continueAt
106    should hold the guest IP of the next insn to disassemble.
107 
108    disInstr is not permitted to return Dis_Resteer if resteerOkFn,
109    when applied to the address which it wishes to resteer into,
110    returns False.
111 
112    The resulting IR is added to the end of irbb.
113 */
114 
115 typedef
116 
117    DisResult (*DisOneInstrFn) (
118 
119       /* This is the IRSB to which the resulting IR is to be appended. */
120       /*OUT*/ IRSB*        irbb,
121 
122       /* Return True iff resteering to the given addr is allowed (for
123          branches/calls to destinations that are known at JIT-time) */
124       /*IN*/  Bool         (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
125 
126       /* Should we speculatively resteer across conditional branches?
127          (Experimental and not enabled by default).  The strategy is
128          to assume that backward branches are taken and forward
129          branches are not taken. */
130       /*IN*/  Bool         resteerCisOk,
131 
132       /* Vex-opaque data passed to all caller (valgrind) supplied
133          callbacks. */
134       /*IN*/  void*        callback_opaque,
135 
136       /* Where is the guest code? */
137       /*IN*/  UChar*       guest_code,
138 
139       /* Where is the actual insn?  Note: it's at &guest_code[delta] */
140       /*IN*/  Long         delta,
141 
142       /* What is the guest IP of the insn? */
143       /*IN*/  Addr64       guest_IP,
144 
145       /* Info about the guest architecture */
146       /*IN*/  VexArch      guest_arch,
147       /*IN*/  VexArchInfo* archinfo,
148 
149       /* ABI info for both guest and host */
150       /*IN*/  VexAbiInfo*  abiinfo,
151 
152       /* Is the host bigendian? */
153       /*IN*/  Bool         host_bigendian
154 
155    );
156 
157 
158 /* ---------------------------------------------------------------
159    Top-level BB to IR conversion fn.
160    --------------------------------------------------------------- */
161 
162 /* See detailed comment in bb_to_IR.c. */
163 extern
164 IRSB* bb_to_IR (
165          /*OUT*/VexGuestExtents* vge,
166          /*OUT*/UInt*            n_sc_extents,
167          /*OUT*/UInt*            n_guest_instrs, /* stats only */
168          /*IN*/ void*            callback_opaque,
169          /*IN*/ DisOneInstrFn    dis_instr_fn,
170          /*IN*/ UChar*           guest_code,
171          /*IN*/ Addr64           guest_IP_bbstart,
172          /*IN*/ Bool             (*chase_into_ok)(void*,Addr64),
173          /*IN*/ Bool             host_bigendian,
174          /*IN*/ VexArch          arch_guest,
175          /*IN*/ VexArchInfo*     archinfo_guest,
176          /*IN*/ VexAbiInfo*      abiinfo_both,
177          /*IN*/ IRType           guest_word_type,
178          /*IN*/ UInt             (*needs_self_check)(void*,VexGuestExtents*),
179          /*IN*/ Bool             (*preamble_function)(void*,IRSB*),
180          /*IN*/ Int              offB_GUEST_TISTART,
181          /*IN*/ Int              offB_GUEST_TILEN,
182          /*IN*/ Int              offB_GUEST_IP,
183          /*IN*/ Int              szB_GUEST_IP
184       );
185 
186 
187 #endif /* ndef __VEX_GUEST_GENERIC_BB_TO_IR_H */
188 
189 /*--------------------------------------------------------------------*/
190 /*--- end                                 guest_generic_bb_to_IR.h ---*/
191 /*--------------------------------------------------------------------*/
192