Searched defs:RegWidth (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 662 bool A64Imms::isLogicalImm(unsigned RegWidth, uint64_t Imm, uint32_t &Bits) { in isLogicalImm()
734 bool A64Imms::isLogicalImmBits(unsigned RegWidth, uint32_t Bits, in isLogicalImmBits()
782 bool A64Imms::isMOVZImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift) { in isMOVZImm()
799 bool A64Imms::isMOVNImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift) { in isMOVNImm()
813 bool A64Imms::isOnlyMOVNImm(int RegWidth, uint64_t Value, in isOnlyMOVNImm()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 102 unsigned RegWidth) { in SelectCVTFixedPosOperand()
164 uint32_t RegWidth = N.getValueType().getSizeInBits(); in SelectLogicalImm() local
304 unsigned RegWidth) { in SelectTSTBOperand()
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 561 bool isMoveWideImm(unsigned RegWidth, in isMoveWideImm()
1757 int64_t RegWidth = 0; in validateInstruction() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 640 unsigned RegWidth = getRegisterType(Context, VT).getSizeInBits(); in getNumRegisters() local
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