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1 //===-- AMDILDevice.cpp - Base class for AMDIL Devices --------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 /// \file
9 //==-----------------------------------------------------------------------===//
10 #include "AMDILDevice.h"
11 #include "AMDGPUSubtarget.h"
12 
13 using namespace llvm;
14 // Default implementation for all of the classes.
AMDGPUDevice(AMDGPUSubtarget * ST)15 AMDGPUDevice::AMDGPUDevice(AMDGPUSubtarget *ST) : mSTM(ST) {
16   mHWBits.resize(AMDGPUDeviceInfo::MaxNumberCapabilities);
17   mSWBits.resize(AMDGPUDeviceInfo::MaxNumberCapabilities);
18   setCaps();
19   DeviceFlag = OCL_DEVICE_ALL;
20 }
21 
~AMDGPUDevice()22 AMDGPUDevice::~AMDGPUDevice() {
23     mHWBits.clear();
24     mSWBits.clear();
25 }
26 
getMaxGDSSize() const27 size_t AMDGPUDevice::getMaxGDSSize() const {
28   return 0;
29 }
30 
31 uint32_t
getDeviceFlag() const32 AMDGPUDevice::getDeviceFlag() const {
33   return DeviceFlag;
34 }
35 
getMaxNumCBs() const36 size_t AMDGPUDevice::getMaxNumCBs() const {
37   if (usesHardware(AMDGPUDeviceInfo::ConstantMem)) {
38     return HW_MAX_NUM_CB;
39   }
40 
41   return 0;
42 }
43 
getMaxCBSize() const44 size_t AMDGPUDevice::getMaxCBSize() const {
45   if (usesHardware(AMDGPUDeviceInfo::ConstantMem)) {
46     return MAX_CB_SIZE;
47   }
48 
49   return 0;
50 }
51 
getMaxScratchSize() const52 size_t AMDGPUDevice::getMaxScratchSize() const {
53   return 65536;
54 }
55 
getStackAlignment() const56 uint32_t AMDGPUDevice::getStackAlignment() const {
57   return 16;
58 }
59 
setCaps()60 void AMDGPUDevice::setCaps() {
61   mSWBits.set(AMDGPUDeviceInfo::HalfOps);
62   mSWBits.set(AMDGPUDeviceInfo::ByteOps);
63   mSWBits.set(AMDGPUDeviceInfo::ShortOps);
64   mSWBits.set(AMDGPUDeviceInfo::HW64BitDivMod);
65   if (mSTM->isOverride(AMDGPUDeviceInfo::NoInline)) {
66     mSWBits.set(AMDGPUDeviceInfo::NoInline);
67   }
68   if (mSTM->isOverride(AMDGPUDeviceInfo::MacroDB)) {
69     mSWBits.set(AMDGPUDeviceInfo::MacroDB);
70   }
71   if (mSTM->isOverride(AMDGPUDeviceInfo::Debug)) {
72     mSWBits.set(AMDGPUDeviceInfo::ConstantMem);
73   } else {
74     mHWBits.set(AMDGPUDeviceInfo::ConstantMem);
75   }
76   if (mSTM->isOverride(AMDGPUDeviceInfo::Debug)) {
77     mSWBits.set(AMDGPUDeviceInfo::PrivateMem);
78   } else {
79     mHWBits.set(AMDGPUDeviceInfo::PrivateMem);
80   }
81   if (mSTM->isOverride(AMDGPUDeviceInfo::BarrierDetect)) {
82     mSWBits.set(AMDGPUDeviceInfo::BarrierDetect);
83   }
84   mSWBits.set(AMDGPUDeviceInfo::ByteLDSOps);
85   mSWBits.set(AMDGPUDeviceInfo::LongOps);
86 }
87 
88 AMDGPUDeviceInfo::ExecutionMode
getExecutionMode(AMDGPUDeviceInfo::Caps Caps) const89 AMDGPUDevice::getExecutionMode(AMDGPUDeviceInfo::Caps Caps) const {
90   if (mHWBits[Caps]) {
91     assert(!mSWBits[Caps] && "Cannot set both SW and HW caps");
92     return AMDGPUDeviceInfo::Hardware;
93   }
94 
95   if (mSWBits[Caps]) {
96     assert(!mHWBits[Caps] && "Cannot set both SW and HW caps");
97     return AMDGPUDeviceInfo::Software;
98   }
99 
100   return AMDGPUDeviceInfo::Unsupported;
101 
102 }
103 
isSupported(AMDGPUDeviceInfo::Caps Mode) const104 bool AMDGPUDevice::isSupported(AMDGPUDeviceInfo::Caps Mode) const {
105   return getExecutionMode(Mode) != AMDGPUDeviceInfo::Unsupported;
106 }
107 
usesHardware(AMDGPUDeviceInfo::Caps Mode) const108 bool AMDGPUDevice::usesHardware(AMDGPUDeviceInfo::Caps Mode) const {
109   return getExecutionMode(Mode) == AMDGPUDeviceInfo::Hardware;
110 }
111 
usesSoftware(AMDGPUDeviceInfo::Caps Mode) const112 bool AMDGPUDevice::usesSoftware(AMDGPUDeviceInfo::Caps Mode) const {
113   return getExecutionMode(Mode) == AMDGPUDeviceInfo::Software;
114 }
115 
116 std::string
getDataLayout() const117 AMDGPUDevice::getDataLayout() const {
118   std::string DataLayout = std::string(
119    "e"
120    "-p:32:32:32"
121    "-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
122    "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128"
123    "-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048"
124    "-n32:64"
125   );
126 
127   if (usesHardware(AMDGPUDeviceInfo::DoubleOps)) {
128     DataLayout.append("-f64:64:64");
129   }
130 
131   return DataLayout;
132 }
133