1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the entry points for global functions defined in
11 // the LLVM NVPTX back-end.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef LLVM_TARGET_NVPTX_H
16 #define LLVM_TARGET_NVPTX_H
17
18 #include "MCTargetDesc/NVPTXBaseInfo.h"
19 #include "llvm/IR/Module.h"
20 #include "llvm/IR/Value.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include <cassert>
24 #include <iosfwd>
25
26 namespace llvm {
27 class NVPTXTargetMachine;
28 class FunctionPass;
29 class formatted_raw_ostream;
30
31 namespace NVPTXCC {
32 enum CondCodes {
33 EQ,
34 NE,
35 LT,
36 LE,
37 GT,
38 GE
39 };
40 }
41
NVPTXCondCodeToString(NVPTXCC::CondCodes CC)42 inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
43 switch (CC) {
44 case NVPTXCC::NE: return "ne";
45 case NVPTXCC::EQ: return "eq";
46 case NVPTXCC::LT: return "lt";
47 case NVPTXCC::LE: return "le";
48 case NVPTXCC::GT: return "gt";
49 case NVPTXCC::GE: return "ge";
50 }
51 llvm_unreachable("Unknown condition code");
52 }
53
54 FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
55 llvm::CodeGenOpt::Level OptLevel);
56 FunctionPass *createLowerStructArgsPass(NVPTXTargetMachine &);
57 FunctionPass *createNVPTXReMatPass(NVPTXTargetMachine &);
58 FunctionPass *createNVPTXReMatBlockPass(NVPTXTargetMachine &);
59
60 bool isImageOrSamplerVal(const Value *, const Module *);
61
62 extern Target TheNVPTXTarget32;
63 extern Target TheNVPTXTarget64;
64
65 namespace NVPTX
66 {
67 enum DrvInterface {
68 NVCL,
69 CUDA,
70 TEST
71 };
72
73 // A field inside TSFlags needs a shift and a mask. The usage is
74 // always as follows :
75 // ((TSFlags & fieldMask) >> fieldShift)
76 // The enum keeps the mask, the shift, and all valid values of the
77 // field in one place.
78 enum VecInstType {
79 VecInstTypeShift = 0,
80 VecInstTypeMask = 0xF,
81
82 VecNOP = 0,
83 VecLoad = 1,
84 VecStore = 2,
85 VecBuild = 3,
86 VecShuffle = 4,
87 VecExtract = 5,
88 VecInsert = 6,
89 VecDest = 7,
90 VecOther = 15
91 };
92
93 enum SimpleMove {
94 SimpleMoveMask = 0x10,
95 SimpleMoveShift = 4
96 };
97 enum LoadStore {
98 isLoadMask = 0x20,
99 isLoadShift = 5,
100 isStoreMask = 0x40,
101 isStoreShift = 6
102 };
103
104 namespace PTXLdStInstCode {
105 enum AddressSpace{
106 GENERIC = 0,
107 GLOBAL = 1,
108 CONSTANT = 2,
109 SHARED = 3,
110 PARAM = 4,
111 LOCAL = 5
112 };
113 enum FromType {
114 Unsigned = 0,
115 Signed,
116 Float
117 };
118 enum VecType {
119 Scalar = 1,
120 V2 = 2,
121 V4 = 4
122 };
123 }
124 }
125 } // end namespace llvm;
126
127 // Defines symbolic names for NVPTX registers. This defines a mapping from
128 // register name to register number.
129 #define GET_REGINFO_ENUM
130 #include "NVPTXGenRegisterInfo.inc"
131
132 // Defines symbolic names for the NVPTX instructions.
133 #define GET_INSTRINFO_ENUM
134 #include "NVPTXGenInstrInfo.inc"
135
136 #endif
137