Searched defs:reg1 (Results 1 – 10 of 10) sorted by relevance
| /dalvik/vm/compiler/codegen/ |
| D | CodegenFactory.cpp | 54 int reg1) in loadValueDirect()
74 int reg1) in loadValueDirectFixed()
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| D | RallocUtil.cpp | 105 void dvmCompilerFlushRegWide(CompilationUnit *cUnit, int reg1, int reg2) in dvmCompilerFlushRegWide()
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| /dalvik/vm/compiler/codegen/mips/ |
| D | CodegenFactory.cpp | 48 int reg1) in loadValueDirect()
68 int reg1) in loadValueDirectFixed()
284 int reg1, int reg2, int dOffset, in genRegRegCheck()
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| D | RallocUtil.cpp | 107 static void flushRegWide(CompilationUnit *cUnit, int reg1, int reg2) in flushRegWide()
1017 int reg1, int reg2) in dvmCompilerFlushRegWideForV5TEVFP()
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| D | CodegenDriver.cpp | 2680 int reg1 = rlSrc1.lowReg; in handleFmt22t() local
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| /dalvik/vm/compiler/codegen/arm/ |
| D | ArchFactory.cpp | 74 int reg1, int reg2, int dOffset, in genRegRegCheck()
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| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| D | Gen.cpp | 255 int reg1 = loadValue(cUnit, rlSrc2, kCoreReg).lowReg; in genInlinedMinMaxInt() local
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| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| D | Gen.cpp | 290 int reg1 = loadValue(cUnit, rlSrc2, kCoreReg).lowReg; in genInlinedMinMaxInt() local
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| /dalvik/vm/compiler/codegen/x86/ |
| D | LowerHelper.cpp | 1131 void compare_reg_reg(int reg1, bool isPhysical1, in compare_reg_reg()
1136 void compare_reg_reg_16(int reg1, bool isPhysical1, in compare_reg_reg_16()
1154 void compare_ss_reg_with_reg(LowOp* op, int reg1, bool isPhysical1, in compare_ss_reg_with_reg()
1171 void compare_sd_reg_with_reg(LowOp* op, int reg1, bool isPhysical1, in compare_sd_reg_with_reg()
1370 int reg1, bool isPhysical1, in alu_binary_reg_reg()
1663 void conditional_move_reg_to_reg(OpndSize size, ConditionCode cc, int reg1, bool isPhysical1, int r… in conditional_move_reg_to_reg()
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| /dalvik/vm/analysis/ |
| D | CodeVerify.cpp | 2084 static bool upcastBooleanOp(RegisterLine* registerLine, u4 reg1, u4 reg2) in upcastBooleanOp()
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