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Searched refs:REGSZ (Results 1 – 5 of 5) sorted by relevance

/bionic/libc/arch-mips/include/machine/
Dsignal.h109 #define SC_REGMASK (0*REGSZ)
110 #define SC_STATUS (1*REGSZ)
111 #define SC_PC (2*REGSZ)
115 #define SC_FPC_CSR (SC_ACX+1*REGSZ)
116 #define SC_FPC_EIR (SC_ACX+2*REGSZ)
117 #define SC_USED_MATH (SC_ACX+3*REGSZ)
118 #define SC_DSP (SC_ACX+4*REGSZ)
119 #define SC_MDHI (SC_ACX+5*REGSZ)
122 #define SC_LO1 (SC_HI1+1*REGSZ)
123 #define SC_HI2 (SC_HI1+2*REGSZ)
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Dasm.h128 #define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
145 #define REGSZ 4 /* 32 bit mode register size */ macro
155 #define REGSZ 8 /* 64 bit mode register size */ macro
/bionic/libc/arch-mips/bionic/
D_setjmp.S45 GPOFF= FRAMESZ-2*REGSZ
68 REG_S v0, SC_REGS+ZERO*REGSZ(a0)
69 REG_S s0, SC_REGS+S0*REGSZ(a0)
70 REG_S s1, SC_REGS+S1*REGSZ(a0)
71 REG_S s2, SC_REGS+S2*REGSZ(a0)
72 REG_S s3, SC_REGS+S3*REGSZ(a0)
73 REG_S s4, SC_REGS+S4*REGSZ(a0)
74 REG_S s5, SC_REGS+S5*REGSZ(a0)
75 REG_S s6, SC_REGS+S6*REGSZ(a0)
76 REG_S s7, SC_REGS+S7*REGSZ(a0)
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Dsetjmp.S43 A1OFF= FRAMESZ-4*REGSZ
44 A0OFF= FRAMESZ-3*REGSZ
45 GPOFF= FRAMESZ-2*REGSZ
46 RAOFF= FRAMESZ-1*REGSZ
82 REG_S v0, SC_REGS+ZERO*REGSZ(a0)
83 REG_S s0, SC_REGS+S0*REGSZ(a0)
84 REG_S s1, SC_REGS+S1*REGSZ(a0)
85 REG_S s2, SC_REGS+S2*REGSZ(a0)
86 REG_S s3, SC_REGS+S3*REGSZ(a0)
87 REG_S s4, SC_REGS+S4*REGSZ(a0)
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Dsigsetjmp.S43 GPOFF= FRAMESZ-2*REGSZ
49 REG_S a1, (_JBLEN*REGSZ)(a0) # save "savemask"
66 REG_L t0, (_JBLEN*REGSZ)(a0) # get "savemask"