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Searched refs:FPREG (Results 1 – 11 of 11) sorted by relevance

/dalvik/vm/compiler/codegen/mips/Mips32/
DFactory.cpp95 int isFpReg = FPREG(rDest); in loadConstantNoClobber()
430 if (FPREG(rDest)) { in loadBaseIndexed()
493 if (FPREG(rSrc)) { in storeBaseIndexed()
617 if (FPREG(rDest)) { in loadBaseDispBody()
622 assert(FPREG(rDestHi)); in loadBaseDispBody()
635 if (FPREG(rDest)) { in loadBaseDispBody()
735 if (FPREG(rSrc)) { in storeBaseDispBody()
740 assert(FPREG(rSrcHi)); in storeBaseDispBody()
753 if (FPREG(rSrc)) { in storeBaseDispBody()
840 if (FPREG(rDest) || FPREG(rSrc)) in genRegCopyNoInsert()
[all …]
/dalvik/vm/compiler/codegen/arm/Thumb2/
DFactory.cpp149 if (FPREG(rDest)) { in loadConstantNoClobber()
707 if (FPREG(rDestLo)) { in loadConstantValueWide()
755 if (FPREG(rDest)) { in loadBaseIndexed()
819 if (FPREG(rSrc)) { in storeBaseIndexed()
889 if (FPREG(rDest)) { in loadBaseDispBody()
891 assert(FPREG(rDestHi)); in loadBaseDispBody()
909 if (FPREG(rDest)) { in loadBaseDispBody()
1023 if (!FPREG(rSrc)) { in storeBaseDispBody()
1031 assert(FPREG(rSrcHi)); in storeBaseDispBody()
1042 if (FPREG(rSrc)) { in storeBaseDispBody()
[all …]
/dalvik/vm/compiler/codegen/
DRallocUtil.cpp611 return !FPREG(reg); in regClassMatches()
613 return FPREG(reg); in regClassMatches()
709 match = match && (FPREG(infoLo->reg) == FPREG(infoHi->reg)); in dvmCompilerUpdateLocWide()
711 if (match && FPREG(infoLo->reg)) { in dvmCompilerUpdateLocWide()
727 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in dvmCompilerUpdateLocWide()
758 assert(FPREG(loc.lowReg) == FPREG(loc.highReg)); in evalLocWide()
759 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in evalLocWide()
774 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in evalLocWide()
793 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in evalLocWide()
DCodegenFactory.cpp212 assert(FPREG(rlSrc.lowReg)==FPREG(rlSrc.highReg)); in storeValueWide()
/dalvik/vm/compiler/codegen/mips/
DRallocUtil.cpp683 return !FPREG(reg); in regClassMatches()
685 return FPREG(reg); in regClassMatches()
781 match = match && (FPREG(infoLo->reg) == FPREG(infoHi->reg)); in dvmCompilerUpdateLocWide()
783 if (match && FPREG(infoLo->reg)) { in dvmCompilerUpdateLocWide()
799 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in dvmCompilerUpdateLocWide()
830 assert(FPREG(loc.lowReg) == FPREG(loc.highReg)); in evalLocWide()
831 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in evalLocWide()
846 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in evalLocWide()
865 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0)); in evalLocWide()
DMipsLIR.h70 #define FPREG(x) ((x & FP_REG_OFFSET) == FP_REG_OFFSET) macro
74 #define SINGLEREG(x) (FPREG(x) && !DOUBLEREG(x))
DCodegenFactory.cpp203 assert(FPREG(rlSrc.lowReg)==FPREG(rlSrc.highReg)); in storeValueWide()
DCodegenCommon.cpp111 if (FPREG(reg)) { in getRegMaskCommon()
/dalvik/vm/compiler/codegen/arm/
DArmLIR.h70 #define FPREG(x) ((x & FP_REG_OFFSET) == FP_REG_OFFSET) macro
73 #define SINGLEREG(x) (FPREG(x) && !DOUBLEREG(x))
DCodegenCommon.cpp103 shift = FPREG(reg) ? kFPReg0 : 0; in getRegMaskCommon()
/dalvik/vm/compiler/codegen/arm/FP/
DThumb2VFP.cpp254 assert(!FPREG(rlResult.lowReg)); in genCmpFP()