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Searched refs:IS_QUAD_OP (Results 1 – 7 of 7) sorted by relevance

/dalvik/vm/compiler/codegen/arm/
DAssemble.cpp544 IS_QUAD_OP | REG_DEF0_USE12 | SETS_CCODES,
549 IS_QUAD_OP | REG_DEF0_USE12 | SETS_CCODES,
554 IS_QUAD_OP | REG_DEF0_USE12 | USES_CCODES | SETS_CCODES,
577 kFmtBWidth, 4, 0, IS_QUAD_OP | REG_DEF0_USE1,
581 kFmtBWidth, 4, 0, IS_QUAD_OP | REG_DEF0_USE1,
585 kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,
589 kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,
593 kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,
597 kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,
601 kFmtBitBlt, 5, 4, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,
[all …]
DCodegenCommon.cpp324 (EncodingMap[opcode].flags & IS_QUAD_OP)); in newLIR4()
DArmLIR.h694 #define IS_QUAD_OP (1 << kIsQuadOp) macro
/dalvik/vm/compiler/codegen/mips/
DCodegenCommon.cpp331 (EncodingMap[opcode].flags & IS_QUAD_OP)); in newLIR4()
DMipsLIR.h540 #define IS_QUAD_OP (1 << kIsQuadOp) macro
DAssemble.cpp143 kFmtBitBlt, 20, 16, IS_QUAD_OP | REG_DEF01 | REG_USE23,
148 kFmtBitBlt, 15, 11, IS_QUAD_OP | REG_DEF0 | REG_USE1,
/dalvik/vm/compiler/codegen/arm/Thumb2/
DFactory.cpp414 } else if (EncodingMap[opcode].flags & IS_QUAD_OP) in opRegRegShift()
484 if (EncodingMap[opcode].flags & IS_QUAD_OP) in opRegRegRegShift()
611 if (EncodingMap[altOpcode].flags & IS_QUAD_OP) in opRegRegImm()