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/dalvik/vm/compiler/template/armv5te/
DTEMPLATE_SHL_LONG.S8 and r2, r2, #63 @ r2<- r2 & 0x3f
9 mov r1, r1, asl r2 @ r1<- r1 << r2
10 rsb r3, r2, #32 @ r3<- 32 - r2
11 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
12 subs ip, r2, #32 @ ip<- r2 - 32
13 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
14 mov r0, r0, asl r2 @ r0<- r0 << r2
DTEMPLATE_USHR_LONG.S8 and r2, r2, #63 @ r0<- r0 & 0x3f
9 mov r0, r0, lsr r2 @ r0<- r2 >> r2
10 rsb r3, r2, #32 @ r3<- 32 - r2
11 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
12 subs ip, r2, #32 @ ip<- r2 - 32
13 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
14 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
DTEMPLATE_SHR_LONG.S8 and r2, r2, #63 @ r0<- r0 & 0x3f
9 mov r0, r0, lsr r2 @ r0<- r2 >> r2
10 rsb r3, r2, #32 @ r3<- 32 - r2
11 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
12 subs ip, r2, #32 @ ip<- r2 - 32
13 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
14 mov r1, r1, asr r2 @ r1<- r1 >> r2
DTEMPLATE_STRING_COMPARETO.S19 mov r2, r0 @ this to r2, opening up r0 for return value
20 subs r0, r2, r1 @ Same?
23 ldr r4, [r2, #STRING_FIELDOFF_OFFSET]
25 ldr r7, [r2, #STRING_FIELDOFF_COUNT]
27 ldr r2, [r2, #STRING_FIELDOFF_VALUE]
43 add r2, r2, r4, lsl #1
49 add r2, #16-2 @ offset to contents[-1]
70 ldrh r3, [r2, #2]!
72 ldrh r7, [r2, #2]!
83 ldrh r3, [r2, #2]!
[all …]
/dalvik/vm/mterp/armv6t2/
DOP_USHR_LONG_2ADDR.S9 GET_VREG(r2, r3) @ r2<- vB
11 and r2, r2, #63 @ r2<- r2 & 0x3f
14 mov r0, r0, lsr r2 @ r0<- r2 >> r2
15 rsb r3, r2, #32 @ r3<- 32 - r2
16 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
17 subs ip, r2, #32 @ ip<- r2 - 32
19 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
20 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
DOP_SHR_LONG_2ADDR.S9 GET_VREG(r2, r3) @ r2<- vB
11 and r2, r2, #63 @ r2<- r2 & 0x3f
14 mov r0, r0, lsr r2 @ r0<- r2 >> r2
15 rsb r3, r2, #32 @ r3<- 32 - r2
16 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
17 subs ip, r2, #32 @ ip<- r2 - 32
19 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
20 mov r1, r1, asr r2 @ r1<- r1 >> r2
DOP_SHL_LONG_2ADDR.S9 GET_VREG(r2, r3) @ r2<- vB
11 and r2, r2, #63 @ r2<- r2 & 0x3f
14 mov r1, r1, asl r2 @ r1<- r1 << r2
15 rsb r3, r2, #32 @ r3<- 32 - r2
16 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
17 subs ip, r2, #32 @ ip<- r2 - 32
19 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
20 mov r0, r0, asl r2 @ r0<- r0 << r2
/dalvik/vm/mterp/armv5te/
DOP_USHR_LONG_2ADDR.S10 GET_VREG(r2, r3) @ r2<- vB
12 and r2, r2, #63 @ r2<- r2 & 0x3f
15 mov r0, r0, lsr r2 @ r0<- r2 >> r2
16 rsb r3, r2, #32 @ r3<- 32 - r2
17 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
18 subs ip, r2, #32 @ ip<- r2 - 32
20 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
21 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
DOP_SHR_LONG_2ADDR.S10 GET_VREG(r2, r3) @ r2<- vB
12 and r2, r2, #63 @ r2<- r2 & 0x3f
15 mov r0, r0, lsr r2 @ r0<- r2 >> r2
16 rsb r3, r2, #32 @ r3<- 32 - r2
17 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
18 subs ip, r2, #32 @ ip<- r2 - 32
20 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
21 mov r1, r1, asr r2 @ r1<- r1 >> r2
DOP_SHL_LONG_2ADDR.S10 GET_VREG(r2, r3) @ r2<- vB
12 and r2, r2, #63 @ r2<- r2 & 0x3f
15 mov r1, r1, asl r2 @ r1<- r1 << r2
16 rsb r3, r2, #32 @ r3<- 32 - r2
17 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
18 subs ip, r2, #32 @ ip<- r2 - 32
20 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
21 mov r0, r0, asl r2 @ r0<- r0 << r2
DOP_SHL_LONG.S14 GET_VREG(r2, r0) @ r2<- vCC
16 and r2, r2, #63 @ r2<- r2 & 0x3f
19 mov r1, r1, asl r2 @ r1<- r1 << r2
20 rsb r3, r2, #32 @ r3<- 32 - r2
21 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
22 subs ip, r2, #32 @ ip<- r2 - 32
23 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
29 mov r0, r0, asl r2 @ r0<- r0 << r2
DOP_USHR_LONG.S14 GET_VREG(r2, r0) @ r2<- vCC
16 and r2, r2, #63 @ r0<- r0 & 0x3f
19 mov r0, r0, lsr r2 @ r0<- r2 >> r2
20 rsb r3, r2, #32 @ r3<- 32 - r2
21 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
22 subs ip, r2, #32 @ ip<- r2 - 32
23 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
29 mov r1, r1, lsr r2 @ r1<- r1 >>> r2
DOP_SHR_LONG.S14 GET_VREG(r2, r0) @ r2<- vCC
16 and r2, r2, #63 @ r0<- r0 & 0x3f
19 mov r0, r0, lsr r2 @ r0<- r2 >> r2
20 rsb r3, r2, #32 @ r3<- 32 - r2
21 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
22 subs ip, r2, #32 @ ip<- r2 - 32
23 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
29 mov r1, r1, asr r2 @ r1<- r1 >> r2
DOP_INVOKE_SUPER_QUICK.S12 ldr r2, [rSELF, #offThread_method] @ r2<- current method
17 ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
19 ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
21 ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
23 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
DOP_IPUT_OBJECT_QUICK.S5 mov r2, rINST, lsr #12 @ r2<- B
6 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
9 mov r2, rINST, lsr #8 @ r2<- A(+)
11 and r2, r2, #15
12 GET_VREG(r0, r2) @ r0<- fp[A]
13 ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
17 strneb r2, [r2, r3, lsr #GC_CARD_SHIFT] @ mark card based on obj head
DOP_MUL_LONG.S22 and r2, r0, #255 @ r2<- BB
24 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
26 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
27 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
28 mul ip, r2, r1 @ ip<- ZxW
29 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
30 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
32 add r10, r2, r10 @ r10<- r10 + low(ZxW + (YxX))
DOP_IPUT_WIDE.S11 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pResFields
13 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
16 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
18 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
31 mov r2, rINST, lsr #8 @ r2<- A+
33 and r2, r2, #15 @ r2<- A
35 add r2, rFP, r2, lsl #2 @ r3<- &fp[A]
38 ldmia r2, {r0-r1} @ r0/r1<- fp[A]
41 add r2, r9, r3 @ r2<- target address
42 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
DOP_SPUT_WIDE.S14 ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
16 cmp r2, #0 @ is resolved entry null?
18 .L${opcode}_finish: @ field ptr in r2, AA in r9
23 add r2, r2, #offStaticField_value @ r2<- pointer to data
24 bl dvmQuasiAtomicSwap64Sync @ stores r0/r1 into addr r2
26 strd r0, [r2, #offStaticField_value] @ field<- vAA/vAA+1
40 ldr r2, [rSELF, #offThread_method] @ r2<- current method
45 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
48 mov r2, r0 @ copy to r2
DOP_MOVE_WIDE.S4 mov r2, rINST, lsr #8 @ r2<- A(+)
6 and r2, r2, #15
8 add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
11 stmia r2, {r0-r1} @ fp[A]<- r0/r1
DOP_IPUT_QUICK.S5 mov r2, rINST, lsr #12 @ r2<- B
6 GET_VREG(r3, r2) @ r3<- fp[B], the object pointer
9 mov r2, rINST, lsr #8 @ r2<- A(+)
11 and r2, r2, #15
12 GET_VREG(r0, r2) @ r0<- fp[A]
DbinopWide.S20 and r2, r0, #255 @ r2<- BB
23 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
25 ldmia r2, {r0-r1} @ r0/r1<- vBB/vBB+1
26 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1
28 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
DOP_IGET.S16 ldr r2, [r3, #offDvmDex_pResFields] @ r2<- pDvmDex->pResFields
18 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
21 8: ldr r2, [rSELF, #offThread_method] @ r2<- current method
23 ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
42 mov r2, rINST, lsr #8 @ r2<- A+
44 and r2, r2, #15 @ r2<- A
46 SET_VREG(r0, r2) @ fp[A]<- r0
/dalvik/vm/compiler/template/out/
DCompilerTemplateAsm-armv7-a-neon.S147 subs r0, r0, r2 @ r0<- r0 - r2
170 stmfd sp!, {r0-r2,lr} @ preserve live registers
175 ldmfd sp!, {r0-r2,lr} @ restore live registers
186 ldr r2, [r10, #(offStackSaveArea_method - sizeofStackSaveArea)]
187 @ r2<- method we're returning to
388 ldreqh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
438 mov r2, #0
440 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache
445 mov r2, r0 @ arg2<- methodToCall
450 @ r2=methodToCall, r6=rSELF
[all …]
DCompilerTemplateAsm-armv7-a.S147 subs r0, r0, r2 @ r0<- r0 - r2
170 stmfd sp!, {r0-r2,lr} @ preserve live registers
175 ldmfd sp!, {r0-r2,lr} @ restore live registers
186 ldr r2, [r10, #(offStackSaveArea_method - sizeofStackSaveArea)]
187 @ r2<- method we're returning to
388 ldreqh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
438 mov r2, #0
440 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache
445 mov r2, r0 @ arg2<- methodToCall
450 @ r2=methodToCall, r6=rSELF
[all …]
DCompilerTemplateAsm-armv5te-vfp.S147 subs r0, r0, r2 @ r0<- r0 - r2
170 stmfd sp!, {r0-r2,lr} @ preserve live registers
175 ldmfd sp!, {r0-r2,lr} @ restore live registers
186 ldr r2, [r10, #(offStackSaveArea_method - sizeofStackSaveArea)]
187 @ r2<- method we're returning to
388 ldreqh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
438 mov r2, #0
440 str r2, [rSELF, #offThread_inJitCodeCache] @ not in the jit code cache
445 mov r2, r0 @ arg2<- methodToCall
450 @ r2=methodToCall, r6=rSELF
[all …]

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