Home
last modified time | relevance | path

Searched refs:CP0SRSC3_SRS11 (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-mips/
Dtranslate_init.c300 (0x3fe << CP0SRSC3_SRS11) | (0x3fe << CP0SRSC3_SRS10),
Dcpu.h255 #define CP0SRSC3_SRS11 10 macro