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Searched refs:CP0_SRSConf3_rw_bitmask (Results 1 – 4 of 4) sorted by relevance

/external/qemu/target-mips/
Dtranslate_init.c89 int32_t CP0_SRSConf3_rw_bitmask; member
298 .CP0_SRSConf3_rw_bitmask = 0x3fffffff,
Dcpu.h251 int32_t CP0_SRSConf3_rw_bitmask; member
Dop_helper.c1096 env->CP0_SRSConf3 |= arg1 & env->CP0_SRSConf3_rw_bitmask; in helper_mtc0_srsconf3()
Dtranslate.c8651 env->CP0_SRSConf3_rw_bitmask = env->cpu_model->CP0_SRSConf3_rw_bitmask; in cpu_reset()