| /external/antlr/antlr-3.4/runtime/CSharp2/Sources/ |
| D | Antlr3.Runtime (VS2008).sln | 12 Debug|Any CPU = Debug|Any CPU
13 Release|Any CPU = Release|Any CPU
16 {CF15D0D5-BE72-4F98-B70F-229ABA1DF0E8}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
17 {CF15D0D5-BE72-4F98-B70F-229ABA1DF0E8}.Debug|Any CPU.Build.0 = Debug|Any CPU
18 {CF15D0D5-BE72-4F98-B70F-229ABA1DF0E8}.Release|Any CPU.ActiveCfg = Release|Any CPU
19 {CF15D0D5-BE72-4F98-B70F-229ABA1DF0E8}.Release|Any CPU.Build.0 = Release|Any CPU
20 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
21 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Debug|Any CPU.Build.0 = Debug|Any CPU
22 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Release|Any CPU.ActiveCfg = Release|Any CPU
23 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Release|Any CPU.Build.0 = Release|Any CPU
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| D | Antlr3.Runtime (VS2005).sln | 12 Debug|Any CPU = Debug|Any CPU
13 Release|Any CPU = Release|Any CPU
16 {784B3027-5E9C-4BF2-BFE6-B5002CAE30AB}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
17 {784B3027-5E9C-4BF2-BFE6-B5002CAE30AB}.Debug|Any CPU.Build.0 = Debug|Any CPU
18 {784B3027-5E9C-4BF2-BFE6-B5002CAE30AB}.Release|Any CPU.ActiveCfg = Release|Any CPU
19 {784B3027-5E9C-4BF2-BFE6-B5002CAE30AB}.Release|Any CPU.Build.0 = Release|Any CPU
20 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
21 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Debug|Any CPU.Build.0 = Debug|Any CPU
22 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Release|Any CPU.ActiveCfg = Release|Any CPU
23 {BEB27DCC-ABFB-4951-B618-2B639EC65A46}.Release|Any CPU.Build.0 = Release|Any CPU
[all …]
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| /external/antlr/antlr-3.4/runtime/CSharp3/Sources/ |
| D | Antlr3.Runtime.sln | 20 Debug|Any CPU = Debug|Any CPU
21 Release|Any CPU = Release|Any CPU
24 {8FDC0A87-9005-4D5A-AB75-E55CEB575559}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
25 {8FDC0A87-9005-4D5A-AB75-E55CEB575559}.Debug|Any CPU.Build.0 = Debug|Any CPU
26 {8FDC0A87-9005-4D5A-AB75-E55CEB575559}.Release|Any CPU.ActiveCfg = Release|Any CPU
27 {8FDC0A87-9005-4D5A-AB75-E55CEB575559}.Release|Any CPU.Build.0 = Release|Any CPU
28 {5EE27A90-B023-42C9-AAF1-52B0424C5D0B}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
29 {5EE27A90-B023-42C9-AAF1-52B0424C5D0B}.Debug|Any CPU.Build.0 = Debug|Any CPU
30 {5EE27A90-B023-42C9-AAF1-52B0424C5D0B}.Release|Any CPU.ActiveCfg = Release|Any CPU
31 {5EE27A90-B023-42C9-AAF1-52B0424C5D0B}.Release|Any CPU.Build.0 = Release|Any CPU
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| /external/llvm/lib/MC/ |
| D | MCSubtargetInfo.cpp | 25 MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { in InitMCProcessorInfo() argument
27 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs, in InitMCProcessorInfo()
30 if (!CPU.empty()) in InitMCProcessorInfo()
31 CPUSchedModel = getSchedModelForCPU(CPU); in InitMCProcessorInfo()
37 MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, in InitMCSubtargetInfo() argument
62 InitMCProcessorInfo(CPU, FS); in InitMCSubtargetInfo()
83 MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { in getSchedModelForCPU()
95 KV.Key = CPU.data(); in getSchedModelForCPU()
98 if (Found == ProcSchedModels+NumProcs || StringRef(Found->Key) != CPU) { in getSchedModelForCPU()
99 errs() << "'" << CPU in getSchedModelForCPU()
[all …]
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86AsmBackend.cpp | 69 StringRef CPU; member in __anon886781570111::X86AsmBackend
72 : MCAsmBackend(), CPU(_CPU) {} in X86AsmBackend()
311 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || in writeNopData()
312 CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") { in writeNopData()
340 ELFX86AsmBackend(const Target &T, uint8_t _OSABI, StringRef CPU) in ELFX86AsmBackend() argument
341 : X86AsmBackend(T, CPU), OSABI(_OSABI) { in ELFX86AsmBackend()
353 ELFX86_32AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU) in ELFX86_32AsmBackend() argument
354 : ELFX86AsmBackend(T, OSABI, CPU) {} in ELFX86_32AsmBackend()
363 ELFX86_64AsmBackend(const Target &T, uint8_t OSABI, StringRef CPU) in ELFX86_64AsmBackend() argument
364 : ELFX86AsmBackend(T, OSABI, CPU) {} in ELFX86_64AsmBackend()
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| /external/webkit/Source/JavaScriptCore/heap/ |
| D | MachineStackMarker.cpp | 312 #if CPU(X86)
314 #elif CPU(X86_64)
316 #elif CPU(PPC)
318 #elif CPU(PPC64)
320 #elif CPU(ARM)
326 #elif OS(WINDOWS) && CPU(X86)
338 #if CPU(X86) in getPlatformThreadRegisters()
341 #elif CPU(X86_64) in getPlatformThreadRegisters()
344 #elif CPU(PPC) in getPlatformThreadRegisters()
347 #elif CPU(PPC64) in getPlatformThreadRegisters()
[all …]
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXSubtarget.cpp | 35 NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU, in NVPTXSubtarget() argument
37 : NVPTXGenSubtargetInfo(TT, CPU, FS), in NVPTXSubtarget()
47 ParseSubtargetFeatures((CPU.empty() ? defCPU : CPU), FS); in NVPTXSubtarget()
50 if (FS.empty() && CPU.empty()) in NVPTXSubtarget()
52 else if (!CPU.empty()) in NVPTXSubtarget()
53 TargetName = CPU; in NVPTXSubtarget()
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| D | NVPTXTargetMachine.cpp | 64 StringRef CPU, in NVPTXTargetMachine() argument
71 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in NVPTXTargetMachine()
72 Subtarget(TT, CPU, FS, is64bit), in NVPTXTargetMachine()
83 StringRef CPU, StringRef FS, in NVPTXTargetMachine32() argument
87 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in NVPTXTargetMachine32()
93 StringRef CPU, StringRef FS, in NVPTXTargetMachine64() argument
97 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in NVPTXTargetMachine64()
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| /external/mdnsresponder/ |
| D | mDNSResponder.sln | 88 Debug|Any CPU = Debug|Any CPU
92 Release|Any CPU = Release|Any CPU
98 {AB581101-18F0-46F6-B56A-83A6B1EA657E}.Debug|Any CPU.ActiveCfg = Debug|x64
105 {AB581101-18F0-46F6-B56A-83A6B1EA657E}.Release|Any CPU.ActiveCfg = Release|x64
112 {C1D98254-BA27-4427-A3BE-A68CA2CC5F69}.Debug|Any CPU.ActiveCfg = Debug|x64
119 {C1D98254-BA27-4427-A3BE-A68CA2CC5F69}.Release|Any CPU.ActiveCfg = Release|x64
126 {208B3A9F-1CA0-4D1D-9D6C-C61616F94705}.Debug|Any CPU.ActiveCfg = Debug|x64
133 {208B3A9F-1CA0-4D1D-9D6C-C61616F94705}.Release|Any CPU.ActiveCfg = Release|x64
140 {F4F15529-F0EB-402F-8662-73C5797EE557}.Debug|Any CPU.ActiveCfg = Debug|x64
147 {F4F15529-F0EB-402F-8662-73C5797EE557}.Release|Any CPU.ActiveCfg = Release|x64
[all …]
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| /external/webkit/Source/JavaScriptCore/wtf/ |
| D | TCSpinLock.h | 37 #if (CPU(X86) || CPU(X86_64) || CPU(PPC)) && (COMPILER(GCC) || COMPILER(MSVC))
66 #if CPU(X86) || CPU(X86_64) in Lock()
96 #if CPU(X86) || CPU(X86_64) in Unlock()
107 #if OS(DARWIN) || CPU(PPC) in Unlock()
147 #if CPU(X86) || CPU(X86_64) in TCMalloc_SlowLock()
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| D | Platform.h | 42 #define CPU(WTF_FEATURE) (defined WTF_CPU_##WTF_FEATURE && WTF_CPU_##WTF_FEATURE) macro
197 #if CPU(SPARC32) || CPU(SPARC64)
247 #define WTF_ARM_ARCH_AT_LEAST(N) (CPU(ARM) && WTF_ARM_ARCH_VERSION >= N)
351 #elif CPU(ARM_TRADITIONAL) && CPU(ARM_THUMB2) /* Sanity Check */
361 #if CPU(ARM) || CPU(MIPS)
615 #if !defined(BUILDING_ON_LEOPARD) && !defined(BUILDING_ON_TIGER) && CPU(X86_64)
1087 #if (CPU(X86_64) && (OS(UNIX) || OS(WINDOWS))) \
1088 || (CPU(IA64) && !CPU(IA64_32)) \
1089 || CPU(ALPHA) \
1090 || CPU(SPARC64) \
[all …]
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| /external/libyuv/files/unit_test/testdata/ |
| D | arm_v7.txt | 4 CPU implementer : 0x56
5 CPU architecture: 7
6 CPU variant : 0x0
7 CPU part : 0x581
8 CPU revision : 5
|
| D | tegra3.txt | 15 CPU implementer : 0�41
16 CPU architecture: 7
17 CPU variant : 0�2
18 CPU part : 0xc09
19 CPU revision : 9
|
| /external/qemu/distrib/ |
| D | update-audio.sh | 27 CPU=`uname -p`
28 if [ "$CPU" == "i386" ] ; then
35 CPU=`uname -m`
36 case "$CPU" in
38 CPU=x86
41 OS=linux-$CPU
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcTargetMachine.cpp | 29 StringRef CPU, StringRef FS, in SparcTargetMachine() argument
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in SparcTargetMachine()
35 Subtarget(TT, CPU, FS, is64bit), in SparcTargetMachine()
79 StringRef TT, StringRef CPU, in SparcV8TargetMachine() argument
85 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in SparcV8TargetMachine()
91 StringRef TT, StringRef CPU, in SparcV9TargetMachine() argument
97 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in SparcV9TargetMachine()
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| /external/qemu/android/build/ |
| D | common.sh | 62 CPU=`uname -m`
63 case "$CPU" in
64 i?86) CPU=x86
66 amd64) CPU=x86_64
68 powerpc) CPU=ppc
72 log2 "CPU=$CPU"
86 OS=darwin-$CPU
90 OS=linux-$CPU
93 OS=freebsd-$CPU
135 HOST_ARCH=$CPU
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| /external/oprofile/events/x86-64/hammer/ |
| D | unit_masks | 116 0x01 GART aperture hit on access from CPU
128 0xa4 Requests Local CPU to Local I/O
129 0xa5 Requests Local (CPU or I/O) to Local I/O
130 0xa8 Requests Local CPU to Local Memory
131 0xaa Requests Local (CPU or I/O) to Local Memory
132 0xac Requests Local CPU to Local (I/O or Mem)
133 0xaf Requests Local (CPU or I/O) to Local (I/O or Mem)
137 0x94 Requests Local CPU to Remote I/O
138 0x95 Requests Local (CPU or I/O) to Remote I/O
139 0x98 Requests Local CPU to Remote Memory
[all …]
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCTargetDesc.cpp | 38 static std::string ParseMipsTriple(StringRef TT, StringRef CPU) { in ParseMipsTriple() argument
55 if (CPU.empty() || CPU == "mips32") { in ParseMipsTriple()
57 } else if (CPU == "mips32r2") { in ParseMipsTriple()
61 if (CPU.empty() || CPU == "mips64") { in ParseMipsTriple()
63 } else if (CPU == "mips64r2") { in ParseMipsTriple()
82 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, in createMipsMCSubtargetInfo() argument
84 std::string ArchFS = ParseMipsTriple(TT,CPU); in createMipsMCSubtargetInfo()
92 InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS); in createMipsMCSubtargetInfo()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 36 StringRef CPU, StringRef FS, in PPCTargetMachine() argument
41 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in PPCTargetMachine()
42 Subtarget(TT, CPU, FS, is64Bit), in PPCTargetMachine()
56 StringRef CPU, StringRef FS, in PPC32TargetMachine() argument
60 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in PPC32TargetMachine()
66 StringRef CPU, StringRef FS, in PPC64TargetMachine() argument
70 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in PPC64TargetMachine()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetMachine.cpp | 40 StringRef CPU, StringRef FS, const TargetOptions &Options, in MipsTargetMachine() argument
44 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in MipsTargetMachine()
45 Subtarget(TT, CPU, FS, isLittle, RM), in MipsTargetMachine()
64 StringRef CPU, StringRef FS, const TargetOptions &Options, in MipsebTargetMachine() argument
67 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in MipsebTargetMachine()
73 StringRef CPU, StringRef FS, const TargetOptions &Options, in MipselTargetMachine() argument
76 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in MipselTargetMachine()
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| /external/v8/src/x64/ |
| D | cpu-x64.cc | 44 void CPU::SetUp() { in SetUp()
49 bool CPU::SupportsCrankshaft() { in SupportsCrankshaft()
54 void CPU::FlushICache(void* start, size_t size) { in FlushICache()
76 void CPU::DebugBreak() { in DebugBreak()
|
| /external/v8/src/ia32/ |
| D | cpu-ia32.cc | 44 void CPU::SetUp() { in SetUp()
49 bool CPU::SupportsCrankshaft() { in SupportsCrankshaft()
54 void CPU::FlushICache(void* start, size_t size) { in FlushICache()
76 void CPU::DebugBreak() { in DebugBreak()
|
| /external/v8/src/arm/ |
| D | cpu-arm.cc | 44 void CPU::SetUp() { in SetUp()
49 bool CPU::SupportsCrankshaft() { in SupportsCrankshaft()
54 void CPU::FlushICache(void* start, size_t size) { in FlushICache()
110 void CPU::DebugBreak() { in DebugBreak()
|
| /external/oprofile/events/x86-64/family11h/ |
| D | unit_masks | 134 0xa4 Requests Local CPU to Local I/O
135 0xa5 Requests Local (CPU or I/O) to Local I/O
136 0xa8 Requests Local CPU to Local Memory
137 0xaa Requests Local (CPU or I/O) to Local Memory
138 0xac Requests Local CPU to Local (I/O or Mem)
139 0xaf Requests Local (CPU or I/O) to Local (I/O or Mem)
143 0x94 Requests Local CPU to Remote I/O
144 0x95 Requests Local (CPU or I/O) to Remote I/O
145 0x98 Requests Local CPU to Remote Memory
146 0x9a Requests Local (CPU or I/O) to Remote Memory
[all …]
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| /external/v8/src/mips/ |
| D | cpu-mips.cc | 50 void CPU::SetUp() { in SetUp()
55 bool CPU::SupportsCrankshaft() { in SupportsCrankshaft()
60 void CPU::FlushICache(void* start, size_t size) { in FlushICache()
104 void CPU::DebugBreak() { in DebugBreak()
|